Lines Matching +full:dw +full:- +full:apb +full:- +full:gpio +full:- +full:port
1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2013-15 Synopsys, Inc. (www.synopsys.com)
11 #include <asm/asm-offsets.h>
31 * intermediate DW APB GPIO blocks (mainly for debouncing) in axs10x_enable_gpio_intc_wire()
33 * --------------------- in axs10x_enable_gpio_intc_wire()
34 * | snps,arc700-intc | in axs10x_enable_gpio_intc_wire()
35 * --------------------- in axs10x_enable_gpio_intc_wire()
37 * ------------------- ------------------- in axs10x_enable_gpio_intc_wire()
38 * | snps,dw-apb-gpio | | snps,dw-apb-gpio | in axs10x_enable_gpio_intc_wire()
39 * ------------------- ------------------- in axs10x_enable_gpio_intc_wire()
43 * ------------------------ in axs10x_enable_gpio_intc_wire()
44 * | snps,dw-apb-intc (MB)| in axs10x_enable_gpio_intc_wire()
45 * ------------------------ in axs10x_enable_gpio_intc_wire()
49 * Current implementation of "irq-dw-apb-ictl" driver doesn't work well in axs10x_enable_gpio_intc_wire()
51 * not yet instantiated. See discussion here - in axs10x_enable_gpio_intc_wire()
54 * So setup the first gpio block as a passive pass thru and hide it from in axs10x_enable_gpio_intc_wire()
55 * DT hardware topology - connect MB intc directly to cpu intc in axs10x_enable_gpio_intc_wire()
56 * The GPIO "wire" needs to be init nevertheless (here) in axs10x_enable_gpio_intc_wire()
87 pr_info("AXS: %s FPGA Date: %u-%u-%u\n", str, board.d, board.m, in axs10x_print_board_ver()
98 mb_rev = 3; /* HT-3 (rev3.0) */ in axs10x_early_init()
100 mb_rev = 2; /* HT-2 (rev2.0) */ in axs10x_early_init()
125 * (0x0000_0000) of DDR Port 0 (slave #1)
183 * GMAC (MB) -> MB AXI Tunnel slave -> CPU Card AXI Tunnel Master -> DDR
272 /* GPIO pins 18 and 19 are used as UART rx and tx, respectively. */ in axs101_early_init()
281 /* map GPIO 14:10 to ARC 9:5 (IRQ mux change for MB v2 onwards) */ in axs101_early_init()
319 "assigned-clock-rates", NULL); in axs103_early_init()
320 freq = be32_to_cpu(*(u32 *)(prop->data)); in axs103_early_init()
322 /* Patching .dtb in-place with new core clock value */ in axs103_early_init()
326 "assigned-clock-rates", &freq, sizeof(freq)); in axs103_early_init()
331 /* Memory maps already config in pre-bootloader */ in axs103_early_init()
333 /* set GPIO mux to UART */ in axs103_early_init()
343 /* connect ICTL - Main Board with GPIO line */ in axs103_early_init()
379 * For the VDK OS-kit, to get the offset to pid and command fields