Lines Matching +full:micro +full:- +full:tlb
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * TLB Exception Handling for ARC
5 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
8 * -MMU v1: moved out legacy code into a separate file
9 * -MMU v3: PD{0,1} bits layout changed: They don't overlap anymore,
13 * -For MMU V2, we need not do heuristics at the time of committing a D-TLB
14 * entry, so that it doesn't knock out its I-TLB entry
15 * -Some more fine tuning:
19 * -Practically rewrote the I/D TLB Miss handlers
26 * -Passing ECR (Exception Cause REG) to do_page_fault( ) for printing
30 * -Added Debug Code to check if sw-ASID == hw-ASID
44 ;-----------------------------------------------------------------
45 ; ARC700 Exception Handling doesn't auto-switch stack and it only provides
48 ; For Non-SMP, the scratch AUX reg is repurposed to cache task PGD, so a
49 ; "global" is used to free-up FIRST core reg to be able to code the rest of
50 ; exception prologue (IRQ auto-disabled on Exceptions, so it's IRQ-safe).
51 ; Since the Fast Path TLB Miss handler is coded with 4 regs, the remaining 3
54 ; [All of this dance is to avoid stack switching for each TLB Miss, since we
60 ; To save the rest of 3 regs - per cpu, the global is made "per-cpu".
61 ; Epilogue thus has to locate the "per-cpu" storage for regs.
62 ; To avoid cache line bouncing the per-cpu global is aligned/sized per
67 ;--------------------------------------------------------------------------
69 ; scratch memory to save [r0-r3] used to code TLB refill Handler
120 std r0, [sp, -16]
121 std r2, [sp, -8]
132 ldd r0, [sp, -16]
133 ldd r2, [sp, -8]
145 ;TLB Miss handling Code
156 ;-----------------------------------------------------------------------------
157 ; This macro does the page-table lookup for the faulting address.
158 ; OUT: r0 = PTE faulted on, r1 = ptr to PTE, r2 = Faulting V-address
178 and r0, r0, (PTRS_PER_PUD - 1)
187 and r0, r0, (PTRS_PER_PMD - 1)
204 ; (1) x = addr >> PAGE_SHIFT -> masks page-off bits from @fault-addr
205 ; (2) y = x & (PTRS_PER_PTE - 1) -> to get index
215 lsr r0, r2, ( PAGE_SHIFT - PTE_SIZE_LOG )
216 and r0, r0, ( (PTRS_PER_PTE - 1) << PTE_SIZE_LOG )
224 ;-----------------------------------------------------------------
225 ; Convert Linux PTE entry into TLB entry
226 ; A one-word PTE entry is programmed as two-word TLB Entry [PD0:PD1] in mmu
227 ; (for PAE40, two-words PTE, while three-word TLB Entry [PD0:PD1:PD1HI])
253 ;-----------------------------------------------------------------
254 ; Commit the TLB entry into MMU
259 /* Get free TLB slot: Set = computed from vaddr, way = random */
275 ;-----------------------------------------------------------------------------
276 ; I-TLB Miss Exception Handler
277 ;-----------------------------------------------------------------------------
283 ;----------------------------------------------------------------
284 ; Get the PTE corresponding to V-addr accessed, r2 is setup with EFA
287 ;----------------------------------------------------------------
304 EV_TLBMissI_fast_ret: ; additional label for VDK OS-kit instrumentation
309 ;-----------------------------------------------------------------------------
310 ; D-TLB Miss Exception Handler
311 ;-----------------------------------------------------------------------------
317 ;----------------------------------------------------------------
318 ; Get the PTE corresponding to V-addr accessed
322 ;----------------------------------------------------------------
330 ; -If PAGE_GLOBAL set, they refer to kernel-only flags (vmalloc)
331 ; -Otherwise they are user-mode permissions, and those are exactly
345 ;----------------------------------------------------------------
355 EV_TLBMissD_fast_ret: ; additional label for VDK OS-kit instrumentation
358 ;-------- Common routine to call Linux Page Fault Handler -----------
362 ; Set Z flag if exception in U mode. Hardware micro-ops do this on any
372 ; Restore the 4-scratch regs saved by fast path miss handler
375 ; Slow path TLB Miss handled as a regular ARC Exception
376 ; (stack switching / save the complete reg-file).