1 /* SPDX-License-Identifier: GPL-2.0-only */
3  * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
6  *  -Refactored get_new_mmu_context( ) to only handle live-mm.
7  *   retiring-mm handled in other hooks
10  *  -Major rewrite of Core ASID allocation routine get_new_mmu_context
21 #include <asm-generic/mm_hooks.h>
25  * MMU tags TLBs with an 8-bit ASID, avoiding need to flush the TLB on
26  * context-switch.
28  * ASID is managed per cpu, so task threads across CPUs can have different
32  * Each task is assigned unique ASID, with a simple round-robin allocator
33  * tracked in @asid_cpu. When 8-bit value rolls over,a new cycle is started
38  * The 32 bit @asid_cpu (and mm->asid) have 8 bits MMU PID and rest 24 bits
40  * automagically increments the generation when lower 8 bits rollover.
43 #define MM_CTXT_ASID_MASK	0x000000ff /* MMU PID reg :8 bit PID */
49 #define asid_mm(mm, cpu)	mm->context.asid[cpu]  argument
50 #define hw_pid(mm, cpu)		(asid_mm(mm, cpu) & MM_CTXT_ASID_MASK)  argument
53 #define asid_cpu(cpu)		per_cpu(asid_cache, cpu)  argument
61 	const unsigned int cpu = smp_processor_id();  in get_new_mmu_context()  local
67 	 * Move to new ASID if it was not from current alloc-cycle/generation.  in get_new_mmu_context()
68 	 * This is done by ensuring that the generation bits in both mm->ASID  in get_new_mmu_context()
69 	 * and cpu's ASID counter are exactly same.  in get_new_mmu_context()
76 	if (!((asid_mm(mm, cpu) ^ asid_cpu(cpu)) & MM_CTXT_CYCLE_MASK))  in get_new_mmu_context()
80 	if (unlikely(!(++asid_cpu(cpu) & MM_CTXT_ASID_MASK))) {  in get_new_mmu_context()
85 		 * Above check for rollover of 8 bit ASID in 32 bit container.  in get_new_mmu_context()
89 		if (!asid_cpu(cpu))  in get_new_mmu_context()
90 			asid_cpu(cpu) = MM_CTXT_FIRST_CYCLE;  in get_new_mmu_context()
94 	asid_mm(mm, cpu) = asid_cpu(cpu);  in get_new_mmu_context()
97 	mmu_setup_asid(mm, hw_pid(mm, cpu));  in get_new_mmu_context()
135 	const int cpu = smp_processor_id();  in switch_mm()  local
139 	 * for the switched-out task, unlike some other arches.  in switch_mm()
141 	 * it to CPUs where a task once ran-on, could cause stale TLB entry  in switch_mm()
142 	 * re-use, specially for a multi-threaded task.  in switch_mm()
144 	 *      For a non-aggregating mm_cpumask, IPI not sent C1, and if T1  in switch_mm()
145 	 *      were to re-migrate to C1, it could access the unmapped region  in switch_mm()
148 	cpumask_set_cpu(cpu, mm_cpumask(next));  in switch_mm()
150 	mmu_setup_pgd(next, next->pgd);  in switch_mm()
156  * activate_mm defaults (in asm-generic) to switch_mm and is called at the
164 /* it seemed that deactivate_mm( ) is a reasonable place to do book-keeping
165  * for retiring-mm. However destroy_context( ) still needs to do that because
168  * there is a good chance that task gets sched-out/in, making its ASID valid
172 #include <asm-generic/mmu_context.h>