Lines Matching +full:dsp +full:- +full:reset

1 # SPDX-License-Identifier: GPL-2.0-only
3 # Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
90 source "arch/arc/plat-tb10x/Kconfig"
91 source "arch/arc/plat-axs10x/Kconfig"
92 source "arch/arc/plat-hsdk/Kconfig"
110 	  ISA for the Next Generation ARC-HS cores
128 	  -MMU-v3: Variable Page Sz (4k, 8k, 16k), bigger J-TLB (128x4)
130 	  -Caches: New Prog Model, Region Flush
131 	  -Insns: endian swap, load-locked/store-conditional, time-stamp-ctr
134 	bool "ARC-HS"
139 	    - SMP configurations of up to 4 cores with coherency
140 	    - Optional L2 Cache and IO-Coherency
141 	    - Revised Interrupt Architecture (multiple priorites, reg banks,
143 	    - MMUv4 (PIPT dcache, Huge Pages)
144 	    - Instructions for
155 	string "Override default -mcpu compiler flag"
158 	  Override default -mcpu=xxx compiler flag (which is set depending on
169 	bool "Symmetric Multi-Processing"
177 	int "Maximum number of CPUs (2-4096)"
182 	bool "Enable Halt-on-reset boot mode"
184 	  In SMP configuration cores can be configured as Halt-on-reset
185 	  or they could all start at same time. For Halt-on-reset, non
197 	  This IP block enables SMP in ARC-HS38 cores.
198 	  It provides for cross-core interrupts, multi-core debug
213 	  This option specifies "N", with Line-len = 2 power N
230 	  This can be used to over-ride the global I/D Cache Enable on a
231 	  per-page basis (but only for pages accessed via MMU such as
233 	  TLB entries have a per-page Cache Enable Bit.
274 	  Variable Page size (1k-16k), var JTLB size 128 x (2 or 4)
324 	# if SMP, LV2 enabled ONLY if ARC implementation has LV2 re-entrancy
344 	bool "Insn: SWAPE (endian-swap)"
361 	  Enable gcc to generate 64-bit load/store instructions
371 	bool "Reg Pair ACCL:ACCH (FPU and/or MPY > 6 and/or DSP)"
374 	  Depending on the configuration, CPU can contain accumulator reg-pair
385 	prompt "DSP support"
388 	  Depending on the configuration, CPU can contain DSP registers
394 	bool "No DSP extension presence in HW"
396 	  No DSP extension presence in HW
399 	bool "DSP extension in HW, no support for userspace"
403 	  DSP extension presence in HW, no support for DSP-enabled userspace
404 	  applications. We don't save / restore DSP registers and only do
408 	bool "Support DSP for userspace apps"
413 	  DSP extension presence in HW, support save / restore DSP registers to
414 	  run DSP-enabled userspace applications
417 	bool "Support DSP with AGU for userspace apps"
422 	  DSP and AGU extensions presence in HW, support save / restore DSP
423 	  and AGU registers to run DSP-enabled userspace applications
449 	  -Lower 2G (0 - 0x7FFF_FFFF ) is user virtual, translated by MMU
450 	  -Upper 2G (0x8000_0000 onwards) is untranslated, for kernel
476 	bool "Support for the 40-bit Physical Address Extension"
494 	  kernel-user gutter)
511 	  Use ONLY-IF-ABS-NECESSARY as it will be very slow and also can hide
523 	  Metaware Debugger. This can come in handy for Linux-host communication
550 	  Enable paranoid checks and self-test of both ARC-specific and generic