1 // SPDX-License-Identifier: GPL-2.0
14  * at this point gcc is unable to sanely compile "if (n >= 0)", resulting in a
16  * "bge reg, xx"). I hope alpha-gcc will be fixed to notice this eventually..
27 #define ALIGN_DEST_TO8_UP(d,s,n) \  argument
29 		if (n <= 0) return; \
30 		n--; \
34 #define ALIGN_DEST_TO8_DN(d,s,n) \  argument
36 		if (n <= 0) return; \
37 		n--; \
38 		d--; s--; \
44  * is aligned, but we don't fill in a full quad-word
46 #define DO_REST_UP(d,s,n) \  argument
47 	while (n > 0) { \
48 		n--; \
52 #define DO_REST_DN(d,s,n) \  argument
53 	while (n > 0) { \
54 		n--; \
55 		d--; s--; \
61  * aligned, but we don't fill in a full quad-word
63 #define DO_REST_ALIGNED_UP(d,s,n) DO_REST_UP(d,s,n)  argument
64 #define DO_REST_ALIGNED_DN(d,s,n) DO_REST_DN(d,s,n)  argument
68  * an unaligned address, as that would do a read-modify-write cycle.
69  * We also want to avoid double-reading the unaligned reads.
74 					  long n)  in __memcpy_unaligned_up()  argument
76 	ALIGN_DEST_TO8_UP(d,s,n);  in __memcpy_unaligned_up()
77 	n -= 8;			/* to avoid compare against 8 in the loop */  in __memcpy_unaligned_up()
78 	if (n >= 0) {  in __memcpy_unaligned_up()
80 		__asm__("ldq_u %0,%1":"=r" (low_word):"m" (*(unsigned long *) s));  in __memcpy_unaligned_up()
83 			__asm__("ldq_u %0,%1":"=r" (high_word):"m" (*(unsigned long *)(s+8)));  in __memcpy_unaligned_up()
84 			n -= 8;  in __memcpy_unaligned_up()
85 			__asm__("extql %1,%2,%0"  in __memcpy_unaligned_up()
88 			__asm__("extqh %1,%2,%0"  in __memcpy_unaligned_up()
91 			s += 8;  in __memcpy_unaligned_up()
93 			d += 8;  in __memcpy_unaligned_up()
95 		} while (n >= 0);  in __memcpy_unaligned_up()
97 	n += 8;  in __memcpy_unaligned_up()
98 	DO_REST_UP(d,s,n);  in __memcpy_unaligned_up()
102 					  long n)  in __memcpy_unaligned_dn()  argument
104 	/* I don't understand AXP assembler well enough for this. -Tim */  in __memcpy_unaligned_dn()
105 	s += n;  in __memcpy_unaligned_dn()
106 	d += n;  in __memcpy_unaligned_dn()
107 	while (n--)  in __memcpy_unaligned_dn()
108 		* (char *) --d = * (char *) --s;  in __memcpy_unaligned_dn()
113  * for the load-store. I don't know why, but it would seem that using a floating
120 					long n)  in __memcpy_aligned_up()  argument
122 	ALIGN_DEST_TO8_UP(d,s,n);  in __memcpy_aligned_up()
123 	n -= 8;  in __memcpy_aligned_up()
124 	while (n >= 0) {  in __memcpy_aligned_up()
126 		__asm__("ldq %0,%1":"=r" (tmp):"m" (*(unsigned long *) s));  in __memcpy_aligned_up()
127 		n -= 8;  in __memcpy_aligned_up()
128 		s += 8;  in __memcpy_aligned_up()
130 		d += 8;  in __memcpy_aligned_up()
132 	n += 8;  in __memcpy_aligned_up()
133 	DO_REST_ALIGNED_UP(d,s,n);  in __memcpy_aligned_up()
136 					long n)  in __memcpy_aligned_dn()  argument
138 	s += n;  in __memcpy_aligned_dn()
139 	d += n;  in __memcpy_aligned_dn()
140 	ALIGN_DEST_TO8_DN(d,s,n);  in __memcpy_aligned_dn()
141 	n -= 8;  in __memcpy_aligned_dn()
142 	while (n >= 0) {  in __memcpy_aligned_dn()
144 		s -= 8;  in __memcpy_aligned_dn()
145 		__asm__("ldq %0,%1":"=r" (tmp):"m" (*(unsigned long *) s));  in __memcpy_aligned_dn()
146 		n -= 8;  in __memcpy_aligned_dn()
147 		d -= 8;  in __memcpy_aligned_dn()
150 	n += 8;  in __memcpy_aligned_dn()
151 	DO_REST_ALIGNED_DN(d,s,n);  in __memcpy_aligned_dn()
156 void * memcpy(void * dest, const void *src, size_t n)  in memcpy()  argument
160 				     n);  in memcpy()
163 	__memcpy_unaligned_up ((unsigned long) dest, (unsigned long) src, n);  in memcpy()