1 /* SPDX-License-Identifier: GPL-2.0 */
3  * arch/alpha/lib/ev6-divide.S
5  * 21264 version contributed by Rick Gorton <rick.gorton@alpha-processor.com>
14  *	__divqu: 64-bit unsigned long divide
15  *	__remqu: 64-bit unsigned long remainder
16  *	__divqs/__remqs: signed 64-bit
17  *	__divlu/__remlu: unsigned 32-bit
18  *	__divls/__remls: signed 32-bit
27  * This is a rather simple bit-at-a-time algorithm: it's very good
28  * at dividing random 64-bit numbers, but the more usual case where
37  *	$0 - current bit
38  *	$1 - shifted divisor
39  *	$2 - modulus/quotient
41  *	$23 - return address
42  *	$24 - dividend
43  *	$25 - divisor
45  *	$27 - quotient/modulus
46  *	$28 - compare status
51  *	ftp.digital.com/pub/Digital/info/semiconductor/literature/dsc-library.html
53  *	E	- either cluster
54  *	U	- upper subcluster; U0 - subcluster U0; U1 - subcluster U1
55  *	L	- lower subcluster; L0 - subcluster L0; L1 - subcluster L1
65 #define mask	$0  macro
72 #define DIV_ONLY(x,y...) x,##y  argument
73 #define MOD_ONLY(x,y...)  argument
74 #define func(x) __div##x  argument
77 #define GETSIGN(x) xor $24,$25,x  argument
80 #define DIV_ONLY(x,y...)  argument
81 #define MOD_ONLY(x,y...) x,##y  argument
82 #define func(x) __rem##x  argument
85 #define GETSIGN(x) bis $24,$24,x  argument
90  * For 32-bit operations, we need to extend to 64-bit
95 #define LONGIFY(x) zapnot x,15,x  argument
96 #define SLONGIFY(x) addl x,0,x  argument
100 #define LONGIFY(x)  argument
101 #define SLONGIFY(x)  argument
124 	bis	$31,1,mask		# E :
129 	 * In spite of the DIV_ONLY being either a non-instruction
137 	 * shift divisor left, using 3-bit shifts for
138 	 * 32-bit divides as we can't overflow. Three-bit
146 	s8addq	mask,$31,mask		# E :
155 	addq	mask,mask,mask		# E :
167 	DIV_ONLY(addq quotient,mask,tmp2) # E :
171 	srl	mask,1,mask		# U :
184 	bne	mask,2b			# U : U L U L
189 	bne	mask,2b			# U : U L L U
216  * 	-a / b = a / -b = -(a / b)
217  *	-a % b = -(a % b)
218  *	a % -b = a % b
220  * have the property that (x/y)*y + (x%y) = x.