Lines Matching +full:- +full:30
1 /* SPDX-License-Identifier: GPL-2.0 */
14 * __divqu: 64-bit unsigned long divide
15 * __remqu: 64-bit unsigned long remainder
16 * __divqs/__remqs: signed 64-bit
17 * __divlu/__remlu: unsigned 32-bit
18 * __divls/__remls: signed 32-bit
27 * This is a rather simple bit-at-a-time algorithm: it's very good
28 * at dividing random 64-bit numbers, but the more usual case where
37 * $0 - current bit
38 * $1 - shifted divisor
39 * $2 - modulus/quotient
41 * $23 - return address
42 * $24 - dividend
43 * $25 - divisor
45 * $27 - quotient/modulus
46 * $28 - compare status
80 * For 32-bit operations, we need to extend to 64-bit
99 subq $30,STACK,$30
100 .frame $30,STACK,$23
103 7: stq $1, 0($30)
105 stq $2, 8($30)
107 stq $0,16($30)
110 stq tmp1,24($30)
113 DIV_ONLY(stq tmp2,32($30))
118 * shift divisor left, using 3-bit shifts for
119 * 32-bit divides as we can't overflow. Three-bit
148 9: ldq $1, 0($30)
149 ldq $2, 8($30)
150 ldq $0,16($30)
151 ldq tmp1,24($30)
152 DIV_ONLY(ldq tmp2,32($30))
153 addq $30,STACK,$30
162 * -a / b = a / -b = -(a / b)
163 * -a % b = -(a % b)
164 * a % -b = a % b
172 subq $30,STACK,$30
173 .frame $30,STACK,$23
178 stq $24,0($30)
180 stq $25,8($30)
182 stq $23,16($30)
184 stq tmp1,24($30)
188 ldq $24,0($30)
189 ldq $25,8($30)
193 ldq $23,16($30)
195 ldq tmp1,24($30)
196 addq $30,STACK,$30