96 	ctl = &io7->csrs->PO7_LSI_CTL[irq & 0xff].csr; /* assume LSI */  in io7_get_irq_ctl()
98 		ctl = &io7->csrs->PO7_MSI_CTL[((irq - 0x80) >> 5) & 0x0f].csr;  in io7_get_irq_ctl()
174 		 volatile unsigned long *csr,   in io7_redirect_irq()  argument
179 	val = *csr;  in io7_redirect_irq()
183 	*csr = val;  in io7_redirect_irq()
185 	*csr;  in io7_redirect_irq()
196 	val = io7->csrs->PO7_LSI_CTL[which].csr;  in io7_redirect_one_lsi()
200 	io7->csrs->PO7_LSI_CTL[which].csr = val;  in io7_redirect_one_lsi()
202 	io7->csrs->PO7_LSI_CTL[which].csr;  in io7_redirect_one_lsi()
213 	val = io7->csrs->PO7_MSI_CTL[which].csr;  in io7_redirect_one_msi()
217 	io7->csrs->PO7_MSI_CTL[which].csr = val;  in io7_redirect_one_msi()
219 	io7->csrs->PO7_MSI_CTL[which].csr;  in io7_redirect_one_msi()
228 	io7->csrs->PO7_LSI_CTL[which].csr = ((unsigned long)where << 14);  in init_one_io7_lsi()
230 	io7->csrs->PO7_LSI_CTL[which].csr;  in init_one_io7_lsi()
239 	io7->csrs->PO7_MSI_CTL[which].csr = ((unsigned long)where << 14);  in init_one_io7_msi()
241 	io7->csrs->PO7_MSI_CTL[which].csr;  in init_one_io7_msi()
269 	io7_redirect_irq(io7, &io7->csrs->HLT_CTL.csr, boot_cpuid);  in init_io7_irqs()
270 	io7_redirect_irq(io7, &io7->csrs->HPI_CTL.csr, boot_cpuid);  in init_io7_irqs()
271 	io7_redirect_irq(io7, &io7->csrs->CRD_CTL.csr, boot_cpuid);  in init_io7_irqs()
272 	io7_redirect_irq(io7, &io7->csrs->STV_CTL.csr, boot_cpuid);  in init_io7_irqs()
273 	io7_redirect_irq(io7, &io7->csrs->HEI_CTL.csr, boot_cpuid);  in init_io7_irqs()
418 	io7_redirect_irq(io7, &io7->csrs->HLT_CTL.csr, cpuid);  in marvel_smp_callin()
419 	io7_redirect_irq(io7, &io7->csrs->HPI_CTL.csr, cpuid);  in marvel_smp_callin()
420 	io7_redirect_irq(io7, &io7->csrs->CRD_CTL.csr, cpuid);  in marvel_smp_callin()
421 	io7_redirect_irq(io7, &io7->csrs->STV_CTL.csr, cpuid);  in marvel_smp_callin()
422 	io7_redirect_irq(io7, &io7->csrs->HEI_CTL.csr, cpuid);  in marvel_smp_callin()