Lines Matching +full:memory +full:- +full:controller
1 .. SPDX-License-Identifier: GPL-2.0
9 The NVMe PCI endpoint function target driver implements an NVMe PCIe controller
10 using an NVMe fabrics target controller configured with the PCI transport type.
16 controller over a PCIe link, thus implementing an NVMe PCIe device similar to a
17 regular M.2 SSD. The target controller is created in the same manner as when
18 using NVMe over fabrics: the controller represents the interface to an NVMe
22 existing physical NVMe device or an NVMe fabrics host controller (e.g. a NVMe
23 TCP host controller).
51 data buffer is transferred from the host into a local memory buffer before
53 memory buffer is allocated to execute the command and the content of that
56 Controller Capabilities
57 -----------------------
60 are almost identical to the capabilities of the NVMe target controller
63 1) The NVMe PCI endpoint target driver always sets the controller capability
70 resets, the controller capability NSSR bit (NVM Subsystem Reset Supported)
73 4) The boot partition support (BPS), Persistent Memory Region Supported (PMRS)
74 and Controller Memory Buffer Supported (CMBS) capabilities are never
78 ------------------
85 configurable through configfs before starting the controller. To avoid issues
86 with excessive local memory usage for executing commands, MDTS defaults to 512
90 ------------------------------------------------------
93 mapping a PCI address range to local CPU memory addresses. The NVMe PCI
96 1) One memory window for raising MSI or MSI-X interrupts
97 2) One memory window for MMIO transfers
98 3) One memory window for each completion queue
101 operation, the memory windows as described above will generally not be used
103 queues that can be supported is equal to the total number of memory mapping
104 windows of the PCI endpoint controller minus two. E.g. for an endpoint PCI
105 controller with 32 outbound memory windows available, up to 30 completion
107 errors due to the lack of memory windows.
110 -----------------------------
113 controller, BAR 0 is allocated with enough space to accommodate the admin queue
120 the number of MSI-X or MSI vectors available.
127 Limitations and NVMe Specification Non-Compliance
128 -------------------------------------------------
142 -------------------
149 In addition to this, at least one PCI endpoint controller driver should be
152 To facilitate testing, enabling the null-blk driver (CONFIG_BLK_DEV_NULL_BLK)
157 ---------------------
159 To use the NVMe PCI endpoint target driver, at least one endpoint controller
162 To find the list of endpoint controller devices in the system::
165 a40000000.pcie-ep
170 a40000000.pcie-ep
173 with RX-TX signal swapped. If the host PCI slot used does not have
174 plug-and-play capabilities, the host should be powered off when the NVMe PCI
178 --------------------
185 -----------------------------------
193 # mount -t configfs none /sys/kernel/config
196 memory backing). The block device created will be /dev/nullb0 by default::
211 controller when setting up the NVMe PCI endpoint target device. In this
216 # echo -n "Linux-pci-epf" > nvmepf.0.nqn/attr_model
226 # echo -n "/dev/nullb0" > nvmepf.0.nqn/namespaces/1/device_path
233 # echo -n "pci" > 1/addr_trtype
234 # ln -s /sys/kernel/config/nvmet/subsystems/nvmepf.0.nqn \
238 ------------------------------------
266 If the PCI endpoint controller used does not support MSI-X, MSI can be
277 The endpoint function can then be bound to the endpoint controller and the
278 controller started::
281 # ln -s functions/nvmet_pci_epf/nvmepf.0 controllers/a40000000.pcie-ep/
282 # echo 1 > controllers/a40000000.pcie-ep/start
287 .. code-block:: text
292 nvmet_pci_epf nvmet_pci_epf.0: PCI endpoint controller supports MSI-X, 32 vectors
293 …nvmet: Created nvm controller 1 for subsystem nvmepf.0.nqn for NQN nqn.2014-08.org.nvmexpress:uuid…
296 PCI Root-Complex Host
297 ---------------------
302 device controller::
304 nvmet_pci_epf nvmet_pci_epf.0: Enabling controller
309 # lspci -n
322 # nvme id-ctrl /dev/nvme0
323 NVME Identify Controller:
327 mn : Linux-pci-epf
328 fr : 6.13.0-r
350 subclass_code Must be 0x08 (Non-Volatile Memory controller)
357 interrupt_pin Interrupt PIN to use if MSI and MSI-X are not supported