Lines Matching +full:cpu +full:- +full:facing
1 .. SPDX-License-Identifier: GPL-2.0
10 .. _dsa-config-showcases:
13 -----------------------
33 interface. The CPU port is the switch port connected to an Ethernet MAC chip.
42 - when a DSA user interface is brought up, the conduit interface is
44 - when the conduit interface is brought down, all DSA user interfaces are
71 * lan1: 192.0.2.1/30 (192.0.2.0 - 192.0.2.3)
72 * lan2: 192.0.2.5/30 (192.0.2.4 - 192.0.2.7)
73 * lan3: 192.0.2.9/30 (192.0.2.8 - 192.0.2.11)
76 * br0: 192.0.2.129/25 (192.0.2.128 - 192.0.2.255)
79 * br0: 192.0.2.129/25 (192.0.2.128 - 192.0.2.255)
80 * wan: 192.0.2.1/30 (192.0.2.0 - 192.0.2.3)
82 .. _dsa-tagged-configuration:
85 ----------------------------------
92 .. code-block:: sh
109 .. code-block:: sh
135 .. code-block:: sh
162 .. _dsa-vlan-configuration:
165 -------------------------------------
174 .. code-block:: sh
176 # tag traffic on CPU port
219 .. code-block:: sh
221 # tag traffic on CPU port
258 .. code-block:: sh
260 # tag traffic on CPU port
300 ------------------------------------
313 .. code-block:: sh
325 .. code-block:: sh
345 .. code-block:: sh
353 .. code-block:: sh
367 Affinity of user ports to CPU ports
368 -----------------------------------
375 DSA can make use of multiple CPU ports in two ways. First, it is possible to
377 to be processed by a certain CPU port. This way, user space can implement
379 affinities according to the available CPU ports.
381 Secondly, it is possible to perform load balancing between CPU ports on a per
382 packet basis, rather than statically assigning user ports to CPU ports.
385 on the CPU ports facing the physical DSA conduits that constitute the LAG slave
388 To make use of multiple CPU ports, the firmware (device tree) description of
389 the switch must mark all the links between CPU ports and their DSA conduits
390 using the ``ethernet`` reference/phandle. At startup, only a single CPU port
391 and DSA conduit will be used - the numerically first port from the firmware
404 .. code-block:: sh
407 ip -d link show dev swp0
411 # Static CPU port distribution
417 # CPU ports in LAG, using explicit assignment of the DSA conduit
418 ip link add bond0 type bond mode balance-xor && ip link set bond0 up
425 ip -d link show dev swp0
429 # CPU ports in LAG, relying on implicit migration of the DSA conduit
430 ip link add bond0 type bond mode balance-xor && ip link set bond0 up
433 ip -d link show dev swp0
437 Notice that in the case of CPU ports under a LAG, the use of the
446 In a setup with more than 2 physical CPU ports, it is therefore possible to mix
447 static user to CPU port assignment with LAG between DSA conduits. It is not
449 upper interfaces (this includes LAG devices - the conduit must always be the LAG
452 Live changing of the DSA conduit (and thus CPU port) affinity of a user port is