Lines Matching +full:tx +full:- +full:sync +full:- +full:clock
1 # SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)
2 ---
8 -
16 -
20 -
23 render-max: true
24 -
26 name: lock-status
31 -
37 -
41 -
42 name: locked-ho-acq
45 -
48 dpll is in holdover state - lost a valid lock or was forced
50 when dpll lock-state was already DPLL_LOCK_STATUS_LOCKED_HO_ACQ,
51 if dpll lock-state was not DPLL_LOCK_STATUS_LOCKED_HO_ACQ, the
52 dpll's lock-state shall remain DPLL_LOCK_STATUS_UNLOCKED)
53 render-max: true
54 -
56 name: lock-status-error
62 -
67 -
73 -
74 name: media-down
80 -
81 name: fractional-frequency-offset-too-high
83 the FFO (Fractional Frequency Offset) between the RX and TX
87 render-max: true
88 -
90 name: clock-quality-level
92 level of quality of a clock device. This mainly applies when
93 the dpll lock-status is DPLL_LOCK_STATUS_HOLDOVER.
94 The current list is defined according to the table 11-7 contained
95 in ITU-T G.8264/Y.1364 document. One may extend this list freely
96 by other ITU-T defined clock qualities, or different ones defined
100 -
101 name: itu-opt1-prc
103 -
104 name: itu-opt1-ssu-a
105 -
106 name: itu-opt1-ssu-b
107 -
108 name: itu-opt1-eec1
109 -
110 name: itu-opt1-prtc
111 -
112 name: itu-opt1-eprtc
113 -
114 name: itu-opt1-eeec
115 -
116 name: itu-opt1-eprc
117 render-max: true
118 -
120 name: temp-divider
129 -
134 -
136 doc: dpll produces Pulse-Per-Second signal
138 -
140 doc: dpll drives the Ethernet Equipment Clock
141 render-max: true
142 -
144 name: pin-type
149 -
153 -
156 -
157 name: synce-eth-port
158 doc: ethernet port PHY's recovered clock
159 -
160 name: int-oscillator
162 -
164 doc: GNSS recovered clock
165 render-max: true
166 -
168 name: pin-direction
173 -
177 -
180 render-max: true
181 -
183 name: pin-frequency-1-hz
185 -
187 name: pin-frequency-10-khz
189 -
191 name: pin-frequency-77-5-khz
193 -
195 name: pin-frequency-10-mhz
197 -
199 name: pin-state
204 -
208 -
211 -
214 render-max: true
215 -
217 name: pin-capabilities
222 -
223 name: direction-can-change
225 -
226 name: priority-can-change
228 -
229 name: state-can-change
231 -
233 name: phase-offset-divider
243 -
245 name: feature-state
249 -
253 -
258 attribute-sets:
259 -
261 enum-name: dpll_a
263 -
266 -
267 name: module-name
269 -
272 -
273 name: clock-id
275 -
279 -
280 name: mode-supported
283 multi-attr: true
284 -
285 name: lock-status
287 enum: lock-status
288 -
291 -
295 -
296 name: lock-status-error
298 enum: lock-status-error
299 -
300 name: clock-quality-level
302 enum: clock-quality-level
303 multi-attr: true
305 Level of quality of a clock device. This mainly applies when
306 the dpll lock-status is DPLL_LOCK_STATUS_HOLDOVER. This could
310 -
311 name: phase-offset-monitor
313 enum: feature-state
318 -
319 name: phase-offset-avg-factor
322 -
324 enum-name: dpll_a_pin
326 -
329 -
330 name: parent-id
332 -
333 name: module-name
335 -
338 -
339 name: clock-id
341 -
342 name: board-label
344 -
345 name: panel-label
347 -
348 name: package-label
350 -
353 enum: pin-type
354 -
357 enum: pin-direction
358 -
361 -
362 name: frequency-supported
364 multi-attr: true
365 nested-attributes: frequency-range
366 -
367 name: frequency-min
369 -
370 name: frequency-max
372 -
375 -
378 enum: pin-state
379 -
382 enum: pin-capabilities
383 -
384 name: parent-device
386 multi-attr: true
387 nested-attributes: pin-parent-device
388 -
389 name: parent-pin
391 multi-attr: true
392 nested-attributes: pin-parent-pin
393 -
394 name: phase-adjust-min
396 -
397 name: phase-adjust-max
399 -
400 name: phase-adjust
402 -
403 name: phase-offset
405 -
406 name: fractional-frequency-offset
409 The FFO (Fractional Frequency Offset) between the RX and TX
411 (rx_frequency-tx_frequency)/rx_frequency
415 -
416 name: esync-frequency
419 Frequency of Embedded SYNC signal. If provided, the pin is configured
420 with a SYNC signal embedded into its base clock frequency.
421 -
422 name: esync-frequency-supported
424 multi-attr: true
425 nested-attributes: frequency-range
427 If provided a pin is capable of embedding a SYNC signal (within given
429 -
430 name: esync-pulse
433 A ratio of high to low state of a SYNC signal pulse embedded
434 into base clock frequency. Value is in percents.
435 -
436 name: reference-sync
438 multi-attr: true
439 nested-attributes: reference-sync
442 reference-sync pin pair.
444 -
445 name: pin-parent-device
446 subset-of: pin
448 -
449 name: parent-id
450 -
452 -
454 -
456 -
457 name: phase-offset
458 -
459 name: pin-parent-pin
460 subset-of: pin
462 -
463 name: parent-id
464 -
466 -
467 name: frequency-range
468 subset-of: pin
470 -
471 name: frequency-min
472 -
473 name: frequency-max
474 -
475 name: reference-sync
476 subset-of: pin
478 -
480 -
484 enum-name: dpll_cmd
486 -
487 name: device-id-get
490 attribute-set: dpll
491 flags: [admin-perm]
494 pre: dpll-lock-doit
495 post: dpll-unlock-doit
498 - module-name
499 - clock-id
500 - type
503 - id
505 -
506 name: device-get
509 attribute-set: dpll
510 flags: [admin-perm]
513 pre: dpll-pre-doit
514 post: dpll-post-doit
517 - id
518 reply: &dev-attrs
520 - id
521 - module-name
522 - mode
523 - mode-supported
524 - lock-status
525 - lock-status-error
526 - temp
527 - clock-id
528 - type
529 - phase-offset-monitor
530 - phase-offset-avg-factor
533 reply: *dev-attrs
535 -
536 name: device-set
538 attribute-set: dpll
539 flags: [admin-perm]
542 pre: dpll-pre-doit
543 post: dpll-post-doit
546 - id
547 - phase-offset-monitor
548 - phase-offset-avg-factor
549 -
550 name: device-create-ntf
552 notify: device-get
554 -
555 name: device-delete-ntf
557 notify: device-get
559 -
560 name: device-change-ntf
562 notify: device-get
564 -
565 name: pin-id-get
568 attribute-set: pin
569 flags: [admin-perm]
572 pre: dpll-lock-doit
573 post: dpll-unlock-doit
576 - module-name
577 - clock-id
578 - board-label
579 - panel-label
580 - package-label
581 - type
584 - id
586 -
587 name: pin-get
591 - dump request without any attributes given - list all the pins in the
593 - dump request with target dpll - list all the pins registered with
595 - do request with target dpll and target pin - single pin attributes
596 attribute-set: pin
597 flags: [admin-perm]
600 pre: dpll-pin-pre-doit
601 post: dpll-pin-post-doit
604 - id
605 reply: &pin-attrs
607 - id
608 - module-name
609 - clock-id
610 - board-label
611 - panel-label
612 - package-label
613 - type
614 - frequency
615 - frequency-supported
616 - capabilities
617 - parent-device
618 - parent-pin
619 - phase-adjust-min
620 - phase-adjust-max
621 - phase-adjust
622 - fractional-frequency-offset
623 - esync-frequency
624 - esync-frequency-supported
625 - esync-pulse
626 - reference-sync
631 - id
632 reply: *pin-attrs
634 -
635 name: pin-set
637 attribute-set: pin
638 flags: [admin-perm]
641 pre: dpll-pin-pre-doit
642 post: dpll-pin-post-doit
645 - id
646 - frequency
647 - direction
648 - prio
649 - state
650 - parent-device
651 - parent-pin
652 - phase-adjust
653 - esync-frequency
654 - reference-sync
655 -
656 name: pin-create-ntf
658 notify: pin-get
660 -
661 name: pin-delete-ntf
663 notify: pin-get
665 -
666 name: pin-change-ntf
668 notify: pin-get
671 mcast-groups:
673 -