Lines Matching +full:input +full:- +full:clock +full:- +full:frequency
1 # SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)
8 -
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18 doc: input can be only selected by sending a request to dpll
20 -
22 doc: highest prio input pin auto selected by dpll
23 render-max: true
24 -
26 name: lock-status
31 -
34 dpll was not yet locked to any valid input (or forced by setting
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41 -
42 name: locked-ho-acq
45 -
48 dpll is in holdover state - lost a valid lock or was forced
50 when dpll lock-state was already DPLL_LOCK_STATUS_LOCKED_HO_ACQ,
51 if dpll lock-state was not DPLL_LOCK_STATUS_LOCKED_HO_ACQ, the
52 dpll's lock-state shall remain DPLL_LOCK_STATUS_UNLOCKED)
53 render-max: true
54 -
56 name: lock-status-error
62 -
67 -
73 -
74 name: media-down
79 locked on an input pin of type PIN_TYPE_SYNCE_ETH_PORT.
80 -
81 name: fractional-frequency-offset-too-high
83 the FFO (Fractional Frequency Offset) between the RX and TX
86 locked on an input pin of type PIN_TYPE_SYNCE_ETH_PORT.
87 render-max: true
88 -
90 name: clock-quality-level
92 level of quality of a clock device. This mainly applies when
93 the dpll lock-status is DPLL_LOCK_STATUS_HOLDOVER.
94 The current list is defined according to the table 11-7 contained
95 in ITU-T G.8264/Y.1364 document. One may extend this list freely
96 by other ITU-T defined clock qualities, or different ones defined
100 -
101 name: itu-opt1-prc
103 -
104 name: itu-opt1-ssu-a
105 -
106 name: itu-opt1-ssu-b
107 -
108 name: itu-opt1-eec1
109 -
110 name: itu-opt1-prtc
111 -
112 name: itu-opt1-eprtc
113 -
114 name: itu-opt1-eeec
115 -
116 name: itu-opt1-eprc
117 render-max: true
118 -
120 name: temp-divider
129 -
134 -
136 doc: dpll produces Pulse-Per-Second signal
138 -
140 doc: dpll drives the Ethernet Equipment Clock
141 render-max: true
142 -
144 name: pin-type
149 -
153 -
155 doc: external input
156 -
157 name: synce-eth-port
158 doc: ethernet port PHY's recovered clock
159 -
160 name: int-oscillator
162 -
164 doc: GNSS recovered clock
165 render-max: true
166 -
168 name: pin-direction
173 -
174 name: input
175 doc: pin used as a input of a signal
177 -
180 render-max: true
181 -
183 name: pin-frequency-1-hz
185 -
187 name: pin-frequency-10-khz
189 -
191 name: pin-frequency-77_5-khz
193 -
195 name: pin-frequency-10-mhz
197 -
199 name: pin-state
204 -
206 doc: pin connected, active input of phase locked loop
208 -
210 doc: pin disconnected, not considered as a valid input
211 -
213 doc: pin enabled for automatic input selection
214 render-max: true
215 -
217 name: pin-capabilities
222 -
223 name: direction-can-change
225 -
226 name: priority-can-change
228 -
229 name: state-can-change
231 -
233 name: phase-offset-divider
244 attribute-sets:
245 -
247 enum-name: dpll_a
249 -
252 -
253 name: module-name
255 -
258 -
259 name: clock-id
261 -
265 -
266 name: mode-supported
269 multi-attr: true
270 -
271 name: lock-status
273 enum: lock-status
274 -
277 -
281 -
282 name: lock-status-error
284 enum: lock-status-error
285 -
286 name: clock-quality-level
288 enum: clock-quality-level
289 multi-attr: true
291 Level of quality of a clock device. This mainly applies when
292 the dpll lock-status is DPLL_LOCK_STATUS_HOLDOVER. This could
296 -
298 enum-name: dpll_a_pin
300 -
303 -
304 name: parent-id
306 -
307 name: module-name
309 -
312 -
313 name: clock-id
315 -
316 name: board-label
318 -
319 name: panel-label
321 -
322 name: package-label
324 -
327 enum: pin-type
328 -
331 enum: pin-direction
332 -
333 name: frequency
335 -
336 name: frequency-supported
338 multi-attr: true
339 nested-attributes: frequency-range
340 -
341 name: frequency-min
343 -
344 name: frequency-max
346 -
349 -
352 enum: pin-state
353 -
356 enum: pin-capabilities
357 -
358 name: parent-device
360 multi-attr: true
361 nested-attributes: pin-parent-device
362 -
363 name: parent-pin
365 multi-attr: true
366 nested-attributes: pin-parent-pin
367 -
368 name: phase-adjust-min
370 -
371 name: phase-adjust-max
373 -
374 name: phase-adjust
376 -
377 name: phase-offset
379 -
380 name: fractional-frequency-offset
383 The FFO (Fractional Frequency Offset) between the RX and TX
385 (rx_frequency-tx_frequency)/rx_frequency
389 -
390 name: esync-frequency
393 Frequency of Embedded SYNC signal. If provided, the pin is configured
394 with a SYNC signal embedded into its base clock frequency.
395 -
396 name: esync-frequency-supported
398 multi-attr: true
399 nested-attributes: frequency-range
402 range) into its base frequency signal.
403 -
404 name: esync-pulse
408 into base clock frequency. Value is in percents.
409 -
410 name: pin-parent-device
411 subset-of: pin
413 -
414 name: parent-id
415 -
417 -
419 -
421 -
422 name: phase-offset
423 -
424 name: pin-parent-pin
425 subset-of: pin
427 -
428 name: parent-id
429 -
431 -
432 name: frequency-range
433 subset-of: pin
435 -
436 name: frequency-min
437 -
438 name: frequency-max
441 enum-name: dpll_cmd
443 -
444 name: device-id-get
447 attribute-set: dpll
448 flags: [ admin-perm ]
451 pre: dpll-lock-doit
452 post: dpll-unlock-doit
455 - module-name
456 - clock-id
457 - type
460 - id
462 -
463 name: device-get
466 attribute-set: dpll
467 flags: [ admin-perm ]
470 pre: dpll-pre-doit
471 post: dpll-post-doit
474 - id
475 reply: &dev-attrs
477 - id
478 - module-name
479 - mode
480 - mode-supported
481 - lock-status
482 - lock-status-error
483 - temp
484 - clock-id
485 - type
488 reply: *dev-attrs
490 -
491 name: device-set
493 attribute-set: dpll
494 flags: [ admin-perm ]
497 pre: dpll-pre-doit
498 post: dpll-post-doit
501 - id
502 -
503 name: device-create-ntf
505 notify: device-get
507 -
508 name: device-delete-ntf
510 notify: device-get
512 -
513 name: device-change-ntf
515 notify: device-get
517 -
518 name: pin-id-get
521 attribute-set: pin
522 flags: [ admin-perm ]
525 pre: dpll-lock-doit
526 post: dpll-unlock-doit
529 - module-name
530 - clock-id
531 - board-label
532 - panel-label
533 - package-label
534 - type
537 - id
539 -
540 name: pin-get
544 - dump request without any attributes given - list all the pins in the
546 - dump request with target dpll - list all the pins registered with
548 - do request with target dpll and target pin - single pin attributes
549 attribute-set: pin
550 flags: [ admin-perm ]
553 pre: dpll-pin-pre-doit
554 post: dpll-pin-post-doit
557 - id
558 reply: &pin-attrs
560 - id
561 - board-label
562 - panel-label
563 - package-label
564 - type
565 - frequency
566 - frequency-supported
567 - capabilities
568 - parent-device
569 - parent-pin
570 - phase-adjust-min
571 - phase-adjust-max
572 - phase-adjust
573 - fractional-frequency-offset
574 - esync-frequency
575 - esync-frequency-supported
576 - esync-pulse
581 - id
582 reply: *pin-attrs
584 -
585 name: pin-set
587 attribute-set: pin
588 flags: [ admin-perm ]
591 pre: dpll-pin-pre-doit
592 post: dpll-pin-post-doit
595 - id
596 - frequency
597 - direction
598 - prio
599 - state
600 - parent-device
601 - parent-pin
602 - phase-adjust
603 - esync-frequency
604 -
605 name: pin-create-ntf
607 notify: pin-get
609 -
610 name: pin-delete-ntf
612 notify: pin-get
614 -
615 name: pin-change-ntf
617 notify: pin-get
620 mcast-groups:
622 -