Lines Matching +full:clock +full:- +full:phase
1 # SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)
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16 -
20 -
23 render-max: true
24 -
26 name: lock-status
31 -
37 -
41 -
42 name: locked-ho-acq
45 -
48 dpll is in holdover state - lost a valid lock or was forced
50 when dpll lock-state was already DPLL_LOCK_STATUS_LOCKED_HO_ACQ,
51 if dpll lock-state was not DPLL_LOCK_STATUS_LOCKED_HO_ACQ, the
52 dpll's lock-state shall remain DPLL_LOCK_STATUS_UNLOCKED)
53 render-max: true
54 -
56 name: lock-status-error
62 -
67 -
73 -
74 name: media-down
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81 name: fractional-frequency-offset-too-high
87 render-max: true
88 -
90 name: temp-divider
99 -
104 -
106 doc: dpll produces Pulse-Per-Second signal
108 -
110 doc: dpll drives the Ethernet Equipment Clock
111 render-max: true
112 -
114 name: pin-type
119 -
123 -
126 -
127 name: synce-eth-port
128 doc: ethernet port PHY's recovered clock
129 -
130 name: int-oscillator
132 -
134 doc: GNSS recovered clock
135 render-max: true
136 -
138 name: pin-direction
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147 -
150 render-max: true
151 -
153 name: pin-frequency-1-hz
155 -
157 name: pin-frequency-10-khz
159 -
161 name: pin-frequency-77_5-khz
163 -
165 name: pin-frequency-10-mhz
167 -
169 name: pin-state
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176 doc: pin connected, active input of phase locked loop
178 -
181 -
184 render-max: true
185 -
187 name: pin-capabilities
192 -
193 name: direction-can-change
195 -
196 name: priority-can-change
198 -
199 name: state-can-change
201 -
203 name: phase-offset-divider
206 phase offset divider allows userspace to calculate a value of
207 measured signal phase difference between a pin and dpll device
210 integer part of a measured phase offset value.
212 fractional part of a measured phase offset value.
214 attribute-sets:
215 -
217 enum-name: dpll_a
219 -
222 -
223 name: module-name
225 -
228 -
229 name: clock-id
231 -
235 -
236 name: mode-supported
239 multi-attr: true
240 -
241 name: lock-status
243 enum: lock-status
244 -
247 -
251 -
252 name: lock-status-error
254 enum: lock-status-error
255 -
257 enum-name: dpll_a_pin
259 -
262 -
263 name: parent-id
265 -
266 name: module-name
268 -
271 -
272 name: clock-id
274 -
275 name: board-label
277 -
278 name: panel-label
280 -
281 name: package-label
283 -
286 enum: pin-type
287 -
290 enum: pin-direction
291 -
294 -
295 name: frequency-supported
297 multi-attr: true
298 nested-attributes: frequency-range
299 -
300 name: frequency-min
302 -
303 name: frequency-max
305 -
308 -
311 enum: pin-state
312 -
315 enum: pin-capabilities
316 -
317 name: parent-device
319 multi-attr: true
320 nested-attributes: pin-parent-device
321 -
322 name: parent-pin
324 multi-attr: true
325 nested-attributes: pin-parent-pin
326 -
327 name: phase-adjust-min
329 -
330 name: phase-adjust-max
332 -
333 name: phase-adjust
335 -
336 name: phase-offset
338 -
339 name: fractional-frequency-offset
344 (rx_frequency-tx_frequency)/rx_frequency
348 -
349 name: esync-frequency
353 with a SYNC signal embedded into its base clock frequency.
354 -
355 name: esync-frequency-supported
357 multi-attr: true
358 nested-attributes: frequency-range
362 -
363 name: esync-pulse
367 into base clock frequency. Value is in percents.
368 -
369 name: pin-parent-device
370 subset-of: pin
372 -
373 name: parent-id
374 -
376 -
378 -
380 -
381 name: phase-offset
382 -
383 name: pin-parent-pin
384 subset-of: pin
386 -
387 name: parent-id
388 -
390 -
391 name: frequency-range
392 subset-of: pin
394 -
395 name: frequency-min
396 -
397 name: frequency-max
400 enum-name: dpll_cmd
402 -
403 name: device-id-get
406 attribute-set: dpll
407 flags: [ admin-perm ]
410 pre: dpll-lock-doit
411 post: dpll-unlock-doit
414 - module-name
415 - clock-id
416 - type
419 - id
421 -
422 name: device-get
425 attribute-set: dpll
426 flags: [ admin-perm ]
429 pre: dpll-pre-doit
430 post: dpll-post-doit
433 - id
434 reply: &dev-attrs
436 - id
437 - module-name
438 - mode
439 - mode-supported
440 - lock-status
441 - lock-status-error
442 - temp
443 - clock-id
444 - type
447 reply: *dev-attrs
449 -
450 name: device-set
452 attribute-set: dpll
453 flags: [ admin-perm ]
456 pre: dpll-pre-doit
457 post: dpll-post-doit
460 - id
461 -
462 name: device-create-ntf
464 notify: device-get
466 -
467 name: device-delete-ntf
469 notify: device-get
471 -
472 name: device-change-ntf
474 notify: device-get
476 -
477 name: pin-id-get
480 attribute-set: pin
481 flags: [ admin-perm ]
484 pre: dpll-lock-doit
485 post: dpll-unlock-doit
488 - module-name
489 - clock-id
490 - board-label
491 - panel-label
492 - package-label
493 - type
496 - id
498 -
499 name: pin-get
503 - dump request without any attributes given - list all the pins in the
505 - dump request with target dpll - list all the pins registered with
507 - do request with target dpll and target pin - single pin attributes
508 attribute-set: pin
509 flags: [ admin-perm ]
512 pre: dpll-pin-pre-doit
513 post: dpll-pin-post-doit
516 - id
517 reply: &pin-attrs
519 - id
520 - board-label
521 - panel-label
522 - package-label
523 - type
524 - frequency
525 - frequency-supported
526 - capabilities
527 - parent-device
528 - parent-pin
529 - phase-adjust-min
530 - phase-adjust-max
531 - phase-adjust
532 - fractional-frequency-offset
533 - esync-frequency
534 - esync-frequency-supported
535 - esync-pulse
540 - id
541 reply: *pin-attrs
543 -
544 name: pin-set
546 attribute-set: pin
547 flags: [ admin-perm ]
550 pre: dpll-pin-pre-doit
551 post: dpll-pin-post-doit
554 - id
555 - frequency
556 - direction
557 - prio
558 - state
559 - parent-device
560 - parent-pin
561 - phase-adjust
562 - esync-frequency
563 -
564 name: pin-create-ntf
566 notify: pin-get
568 -
569 name: pin-delete-ntf
571 notify: pin-get
573 -
574 name: pin-change-ntf
576 notify: pin-get
579 mcast-groups:
581 -