Lines Matching +full:pwm +full:- +full:offset
10 Addresses scanned: none, address read from Super-I/O config space
24 -----------------
29 configuration for channels 1-5.
30 Legal values are in the range of 0-31. Bit 0 maps to
47 -----------
49 The VIA VT1211 Super-I/O chip includes complete hardware monitoring
52 implements 5 universal input channels (UCH1-5) that can be individually
60 connected to the PWM outputs of the VT1211 :-().
80 ------------------
82 Voltages are sampled by an 8-bit ADC with a LSB of ~10mV. The supported input
91 implementation :-) You will have to find documentation for your own
99 VccP --- --- 1.0 1400 mV [1]_
116 ----------------------
128 temp1 and temp3-temp7, scaling depends on the board implementation and needs
131 Temp1 is an Intel-type thermal diode which requires the following formula to
134 compute temp1 (@-Offset)/Gain, (@*Gain)+Offset
136 According to the VIA VT1211 BIOS porting guide, the following gain and offset
140 Diode Type Offset Gain
145 VIA C3 Ezra-T 73.869 0.9528
152 Temp3-temp7 support NTC thermistors. For these channels, the driver returns
153 the voltages as seen at the individual pins of UCH1-UCH5. The voltage at the
162 Rth = Ro * exp(B * (1 / T - 1 / To)) (To is 298.15K (25C) and Ro is the
168 compute tempx 1 / (1 / 298.15 - (` (2200 / @ - 1)) / 3435) - 273.15,
169 2200 / (1 + (^ (3435 / 298.15 - 3435 / (273.15 + @))))
173 -----------------
175 The VT1211 provides 2 programmable PWM outputs to control the speeds of 2
176 fans. Writing a 2 to any of the two pwm[1-2]_enable sysfs nodes will put the
177 PWM controller in automatic mode. There is only a single controller that
178 controls both PWM outputs but each PWM output can be individually enabled and
181 Each PWM has 4 associated distinct output duty-cycles: full, high, low and
182 off. Full and off are internally hard-wired to 255 (100%) and 0 (0%),
184 pwm[1-2]_auto_point[2-3]_pwm. Each PWM output can be associated with a
185 different thermal input but - and here's the weird part - only one set of
186 thermal thresholds exist that controls both PWMs output duty-cycles. The
187 thermal thresholds are accessible via pwm[1-2]_auto_point[1-4]_temp. Note
190 the first set pwm1_auto_point[1-4]_temp is writable, the second set is
191 read-only).
194 PWM Auto Point PWM Output Duty-Cycle
196 pwm[1-2]_auto_point4_pwm full speed duty-cycle (hard-wired to 255)
197 pwm[1-2]_auto_point3_pwm high speed duty-cycle
198 pwm[1-2]_auto_point2_pwm low speed duty-cycle
199 pwm[1-2]_auto_point1_pwm off duty-cycle (hard-wired to 0)
205 pwm[1-2]_auto_point4_temp full speed temp
206 pwm[1-2]_auto_point3_temp high speed temp
207 pwm[1-2]_auto_point2_temp low speed temp
208 pwm[1-2]_auto_point1_temp off temp
212 PWM output duty-cycle based on the input temperature:
215 Thermal Threshold Output Duty-Cycle Output Duty-Cycle
218 - full speed duty-cycle full speed duty-cycle
220 - high speed duty-cycle full speed duty-cycle
222 - low speed duty-cycle high speed duty-cycle
224 - off duty-cycle low speed duty-cycle