Lines Matching +full:write +full:- +full:data
1 .. SPDX-License-Identifier: GPL-2.0
10 - A natively half-duplex Quad I/O capable SPI master
11 - Low latency I2C interface to support HIDI2C compliant devices
12 - A HW sequencer with RW DMA capability to system memory
18 Hardware sequencer within the THC is responsible for transferring (via DMA) data from touch devices
19 into system memory. A ring buffer is used to avoid data loss due to asynchronous nature of data
20 consumption (by host) in relation to data production (by touch device via DMA).
22 Unlike other common SPI/I2C controllers, THC handles the HID device data interrupt and reset
29 -------------------------------
31 Below diagram illustrates the high-level architecture of THC software/hardware stack, which is fully
36 ----------------------------------------------
37 | +-----------------------------------+ |
39 | +-----------------------------------+ |
40 | +-----------------------------------+ |
41 | | HID Multi-touch Driver | |
42 | +-----------------------------------+ |
43 | +-----------------------------------+ |
45 | +-----------------------------------+ |
46 | +-----------------------------------+ |
48 | +-----------------------------------+ |
49 | +-----------------------------------+ |
51 | +-----------------------------------+ |
52 | +----------------+ +----------------+ |
54 | +----------------+ +----------------+ |
55 ----------------------------------------------
56 ----------------------------------------------
57 | +-----------------------------------+ |
59 | +-----------------------------------+ |
60 | +-----------------------------------+ |
62 | +-----------------------------------+ |
63 | +-----------------------------------+ |
65 | +-----------------------------------+ |
66 ----------------------------------------------
69 components that sense and transfer either discrete touch data or heatmap data in the form of HID
79 low-level driver that manages the THC Controller and implements HIDSPI/HIDI2C protocol.
83 ------------------------
86 ---------------------------------
88 | +---------------------------+ |
90 | +---------------------------+ |
91 | +---------------------------+ |
93 | +---------------------------+ |
94 +---------------+ | +------------+ +------------+ |
95 | System Memory +---+--+ DMA | | PIO | |
96 +---------------+ | +------------+ +------------+ |
97 | +---------------------------+ |
99 | +---------------------------+ |
100 | +------------+ +------------+ |
103 | +------------+ +------------+ |
104 ---------------------------------
115 PIO can let driver manually write/read data to/from Touch ICs, instead, THC DMA can
116 automatically write/read data without driver involved.
119 SPI bus and I2C bus to finish a bus data transaction, it also can automatically handle
120 Touch ICs interrupt and start DMA receive/send data from/to Touch ICs according to interrupt
123 properly, and prepare the formatted data packet or handle received data packet.
133 ------------------
141 --------------------
152 In Single IO mode, THC drives MOSI line to send data to Touch ICs, and receives data from Touch
153 ICs data from MISO line. In Dual IO mode, THC drivers MOSI and MISO both for data sending, and
154 also receives the data on both line. In Quad IO mode, there are other two lines (IO2 and IO3)
155 are added, THC drives MOSI (IO0), MISO (IO1), IO2 and IO3 at the same time for data sending, and
156 also receives the data on those 4 lines. Driver needs to configure THC in different mode by
162 For THC sending data to Touch IC, the data flow on SPI bus::
164 | --------------------THC sends---------------------------------|
165 <8Bits OPCode><24Bits Slave Address><Data><Data><Data>...........
167 For THC receiving data from Touch IC, the data flow on SPI bus::
169 | ---------THC Sends---------------||-----Touch IC sends--------|
170 <8Bits OPCode><24Bits Slave Address><Data><Data><Data>...........
178 value and use PIO write (by setting SubIP write opcode) to do a write operation.
192 --------------------------
199 - if input packet size <= max size, THC continues using input packet size to finish the reading
200 - if input packet size > max size, there is potential input data crash risk during
203 This feature is used to avoid data corruption which will cause RxDMA buffer overrun issue for
207 -------------------
209 Because of MCU performance limitation, some touch devices cannot de-assert interrupt pin
210 immediately after input data is transferred, which cause an interrupt toggle delay. But THC
212 case, the delayed interrupt de-assertion will be recognized as a new interrupt signal by THC,
223 ----------
226 read or PIO write.
228 When THC is configured to SPI mode, opcodes are used for determining the read/write IO mode.
235 0x02 Write Single I/O
237 0xB2 Write Dual I/O
239 0xE2 Write Quad I/O
248 I2C SubIP APB register read, I2C SubIP APB register write, I2C touch IC device read,
249 I2C touch IC device write, I2C touch IC device write followed by read.
251 Here are the THC pre-defined opcodes for I2C mode:
256 0x12 Read I2C SubIP APB internal registers 0h - FFh
257 0x13 Write I2C SubIP APB internal registers 0h - FFh
259 0x18 Write external Touch IC through I2C bus N/A
260 0x1C Write then read external Touch IC through I2C bus N/A
264 -------
268 I/O operations, driver should pre-program PIO control registers and PIO data registers and kick
270 operations (PIO read/write/write followed by read).
273 address, or data register the cycle is blocked and a sequence error will be encountered.
279 Because THC only has 16 FIFO registers for PIO, so all the data transfer through PIO shouldn't
284 So PIO typical use case is, before DMA initialization, write RESET command (PIO write), read
285 RESET response (PIO read or PIO write followed by read), write Power ON command (PIO write), read
290 - Program read/write data size in THC_SS_BC.
291 - Program I/O target address in THC_SW_SEQ_DATA0_ADDR.
292 - If write, program the write data in THC_SW_SEQ_DATA0..THC_SW_SEQ_DATAn.
293 - Program the PIO opcode in THC_SS_CMD.
294 - Set TSSGO = 1 to start the PIO write sequence.
295 - If THC_SS_CD_IE = 1, SW will receives a MSI when the PIO is completed.
296 - If read, read out the data in THC_SW_SEQ_DATA0..THC_SW_SEQ_DATAn.
299 -------
301 THC has 4 DMA channels: Read DMA1, Read DMA2, Write DMA and Software DMA.
307 raw data mode. RxDMA2 is used for HID data mode and it is the RxDMA engine currently driver uses
308 for HID input report data retrieval.
310 RxDMA's typical use case is auto receiving the data from Touch IC. Once RxDMA is enabled by
311 software, THC will start auto-handling receiving logic.
315 above information, THC reads out report body to internal FIFO and start RxDMA coping the data
318 data receiving.
324 input report data. After that, THC update RxDMA PRD table read pointer, then trigger a MSI interrupt
325 to notify driver input report data is ready in system memory.
328 waiting for interrupt ready then read out the data from system memory.
333 THC supports a software triggered RxDMA mode to read the touch data from touch IC. This SW RxDMA
336 interrupt. It gives a flexibility to software driver to use RxDMA read Touch IC data in any time.
338 Before software starts a SW RxDMA, it shall stop the 1st and 2nd RxDMA, clear PRD read/write pointer
342 3.3.3 Write DMA Channel
345 THC has one write DMA engine, which can be used for sending data to Touch IC automatically.
347 before last command is completely handled, next command cannot be sent, THC write DMA engine only
350 What driver needs to do is, preparing PRD table and DMA buffer, then copy data to DMA buffer and
351 update PRD table with buffer address and buffer length, then start write DMA. THC will
352 automatically send the data to touch IC, and trigger a DMA completion interrupt once transferring
356 -------
364 contiguous, but physically fragmented buffer of memory for each data buffer. Linux OS also
372 ------------------------ -------------- --------------
373 | PRD table base address +----+ PRD table #1 +-----+ PRD Entry #1 |
374 ------------------------ -------------- --------------
375 --------------
377 --------------
378 --------------
380 --------------
383 to support multiple data buffers from the Touch IC. This allows host SW to arm the Read DMA engine
384 with multiple buffers, allowing the Touch IC to send multiple data frames to the THC without SW
388 To simplify the design, SW assumes worst-case memory fragmentation. Therefore,each PRD table shall
390 number of PRD-entries per PRD table.
393 register field. The number of PRD tables should equal the number of data buffers.
400 SW allocates all the data buffers and PRD tables only once at host initialization.
402 3.4.2 PRD Write pointer and read pointer
405 As PRD tables are organized as a Circular Buffer (CB), a read pointer and a write pointer for a CB
415 The write pointer is updated by SW. The write pointer points to location in the DMA CB, where the
418 depth is equal to 5 entries (0100b), then the write pointers will follow this pattern (SW is
436 len 87..64 how many bytes of data in this entry.
447 .. code-block:: c
453 In general, every PRD table means one HID touch data packet. Every DMA engine can support
454 up to 128 PRD tables (except write DMA, write DMA only has one PRD table). SW driver is responsible
465 --------------
467 - Call ACPI _RST method to reset Touch IC device.
468 - Read the reset response from TIC through PIO read.
469 - Issue a command to retrieve device descriptor from Touch IC through PIO write.
470 - Read the device descriptor from Touch IC through PIO read.
471 - If the device descriptor is valid, allocate DMA buffers and configure all DMA channels.
472 - Issue a command to retrieve report descriptor from Touch IC through DMA.
474 4.2 Input Report Data Flow
475 --------------------------
479 - Touch IC interrupts the THC Controller using an in-band THC interrupt.
480 - THC Sequencer reads the input report header by transmitting read approval as a signal
482 - THC Sequencer executes a Input Report Body Read operation corresponding to the value
484 - THC DMA engine begins fetching data from the THC Sequencer and writes to host memory
486 THC Sequencer signals all data has been read or the THC DMA Read Engine reaches the
488 - The THC Sequencer checks for the “Last Fragment Flag” bit in the Input Report Header.
490 - If the “Last Fragment Flag” bit is enabled the THC Sequencer enters End-of-Frame Processing.
494 - THC DMA engine increments the read pointer of the Read PRD CB, sets EOF interrupt status
496 - If THC EOF interrupt is enabled by the driver in the control register (THC_M_PRT_READ_DMA_CNTRL_2…
499 Sequence of steps to read data from RX DMA buffer:
501 - THC QuickSPI driver checks CB write Ptr and CB read Ptr to identify if any data frame in DMA
503 - THC QuickSPI driver gets first unprocessed PRD table.
504 - THC QuickSPI driver scans all PRD entries in this PRD table to calculate the total frame size.
505 - THC QuickSPI driver copies all frame data out.
506 - THC QuickSPI driver checks the data type according to input report body, and calls related
507 callbacks to process the data.
508 - THC QuickSPI driver updates write Ptr.
510 4.3 Output Report Data Flow
511 ---------------------------
515 - HID core calls raw_request callback with a request to THC QuickSPI driver.
516 - THC QuickSPI Driver converts request provided data into the output report packet and copies it
517 to THC's write DMA buffer.
518 - Start TxDMA to complete the write operation.
524 --------------
526 - Read device descriptor from Touch IC device through PIO write followed by read.
527 - If the device descriptor is valid, allocate DMA buffers and configure all DMA channels.
528 - Use PIO or TxDMA to write a SET_POWER request to TIC's command register, and check if the
529 write operation is successfully completed.
530 - Use PIO or TxDMA to write a RESET request to TIC's command register. If the write operation
532 - Use SWDMA to read report descriptor through TIC's report descriptor register.
534 5.2 Input Report Data Flow
535 --------------------------
539 - Touch IC asserts the interrupt indicating that it has an interrupt to send to HOST.
541 first 2 bytes from the HIDI2C device which contains the length of the received data.
542 - THC Sequencer continues the Read operation as per the size of data indicated in the
544 - THC DMA engine begins fetching data from the THC Sequencer and writes to host memory
546 plus the remaining data to RxDMA buffer. This process continues until the THC Sequencer
547 signals all data has been read or the THC DMA Read Engine reaches the end of it's last
549 - THC Sequencer enters End-of-Input Report Processing.
550 - If the device has no more input reports to send to the host, it de-asserts the interrupt
556 - THC DMA engine increments the read pointer of the Read PRD CB, sets EOF interrupt status
558 - If THC EOF interrupt is enabled by the driver in the control register
561 Sequence of steps to read data from RX DMA buffer:
563 - THC QuickI2C driver checks CB write Ptr and CB read Ptr to identify if any data frame in DMA
565 - THC QuickI2C driver gets first unprocessed PRD table.
566 - THC QuickI2C driver scans all PRD entries in this PRD table to calculate the total frame size.
567 - THC QuickI2C driver copies all frame data out.
568 - THC QuickI2C driver call hid_input_report to send the input report content to HID core, which
569 includes Report ID + Report Data Content (remove the length field from the original report
570 data).
571 - THC QuickI2C driver updates write Ptr.
573 5.3 Output Report Data Flow
574 ---------------------------
578 - HID core call THC QuickI2C raw_request callback.
579 - THC QuickI2C uses PIO or TXDMA to write a SET_REPORT request to TIC's command register. Report
581 - THC QuickI2C programs TxDMA buffer with TX Data to be written to TIC's data register. The first
595 - HIDSPI: https://download.microsoft.com/download/c/a/0/ca07aef3-3e10-4022-b1e9-c98cea99465d/HidSpi…
596 - HIDI2C: https://download.microsoft.com/download/7/d/d/7dd44bb7-2a7a-4505-ac1c-7227d3d96d5b/hid-ov…