Lines Matching +full:sw +full:- +full:mode
1 .. SPDX-License-Identifier: GPL-2.0
10 - A natively half-duplex Quad I/O capable SPI master
11 - Low latency I2C interface to support HIDI2C compliant devices
12 - A HW sequencer with RW DMA capability to system memory
29 -------------------------------
31 Below diagram illustrates the high-level architecture of THC software/hardware stack, which is fully
36 ----------------------------------------------
37 | +-----------------------------------+ |
39 | +-----------------------------------+ |
40 | +-----------------------------------+ |
41 | | HID Multi-touch Driver | |
42 | +-----------------------------------+ |
43 | +-----------------------------------+ |
45 | +-----------------------------------+ |
46 | +-----------------------------------+ |
48 | +-----------------------------------+ |
49 | +-----------------------------------+ |
51 | +-----------------------------------+ |
52 | +----------------+ +----------------+ |
53 | SW | PCI Bus Driver | | ACPI Resource | |
54 | +----------------+ +----------------+ |
55 ----------------------------------------------
56 ----------------------------------------------
57 | +-----------------------------------+ |
59 | +-----------------------------------+ |
60 | +-----------------------------------+ |
62 | +-----------------------------------+ |
63 | +-----------------------------------+ |
65 | +-----------------------------------+ |
66 ----------------------------------------------
79 low-level driver that manages the THC Controller and implements HIDSPI/HIDI2C protocol.
83 ------------------------
86 ---------------------------------
88 | +---------------------------+ |
90 | +---------------------------+ |
91 | +---------------------------+ |
93 | +---------------------------+ |
94 +---------------+ | +------------+ +------------+ |
95 | System Memory +---+--+ DMA | | PIO | |
96 +---------------+ | +------------+ +------------+ |
97 | +---------------------------+ |
99 | +---------------------------+ |
100 | +------------+ +------------+ |
103 | +------------+ +------------+ |
104 ---------------------------------
133 ------------------
141 --------------------
149 Touch IC. THC enhanced SPI Bus supports different SPI modes: standard Single IO mode,
150 Dual IO mode and Quad IO mode.
152 In Single IO mode, THC drives MOSI line to send data to Touch ICs, and receives data from Touch
153 ICs data from MISO line. In Dual IO mode, THC drivers MOSI and MISO both for data sending, and
154 also receives the data on both line. In Quad IO mode, there are other two lines (IO2 and IO3)
156 also receives the data on those 4 lines. Driver needs to configure THC in different mode by
159 Beside IO mode, driver also needs to configure SPI bus speed. THC supports up to 42MHz SPI clock
164 | --------------------THC sends---------------------------------|
169 | ---------THC Sends---------------||-----Touch IC sends--------|
176 is configured to I2C mode. Comparing to SPI mode which can be configured through MMIO registers
192 --------------------------
199 - if input packet size <= max size, THC continues using input packet size to finish the reading
200 - if input packet size > max size, there is potential input data crash risk during
207 -------------------
209 Because of MCU performance limitation, some touch devices cannot de-assert interrupt pin
212 case, the delayed interrupt de-assertion will be recognized as a new interrupt signal by THC,
223 ----------
228 When THC is configured to SPI mode, opcodes are used for determining the read/write IO mode.
229 There are some OPCode examples for SPI IO mode:
247 When THC is working in I2C mode, opcodes are used to tell THC what's the next PIO type:
251 Here are the THC pre-defined opcodes for I2C mode:
256 0x12 Read I2C SubIP APB internal registers 0h - FFh
257 0x13 Write I2C SubIP APB internal registers 0h - FFh
264 -------
268 I/O operations, driver should pre-program PIO control registers and PIO data registers and kick
290 - Program read/write data size in THC_SS_BC.
291 - Program I/O target address in THC_SW_SEQ_DATA0_ADDR.
292 - If write, program the write data in THC_SW_SEQ_DATA0..THC_SW_SEQ_DATAn.
293 - Program the PIO opcode in THC_SS_CMD.
294 - Set TSSGO = 1 to start the PIO write sequence.
295 - If THC_SS_CD_IE = 1, SW will receives a MSI when the PIO is completed.
296 - If read, read out the data in THC_SW_SEQ_DATA0..THC_SW_SEQ_DATAn.
299 -------
307 raw data mode. RxDMA2 is used for HID data mode and it is the RxDMA engine currently driver uses
311 software, THC will start auto-handling receiving logic.
313 For SPI mode, THC RxDMA sequence is: when Touch IC triggers a interrupt to THC, THC reads out
320 For I2C mode, THC RxDMA's behavior is a little bit different, because of HIDI2C protocol difference
333 THC supports a software triggered RxDMA mode to read the touch data from touch IC. This SW RxDMA
335 difference is this SW RxDMA is triggered by software, and RxDMA2 is triggered by external Touch IC
338 Before software starts a SW RxDMA, it shall stop the 1st and 2nd RxDMA, clear PRD read/write pointer
356 -------
372 ------------------------ -------------- --------------
373 | PRD table base address +----+ PRD table #1 +-----+ PRD Entry #1 |
374 ------------------------ -------------- --------------
375 --------------
377 --------------
378 --------------
380 --------------
383 to support multiple data buffers from the Touch IC. This allows host SW to arm the Read DMA engine
384 with multiple buffers, allowing the Touch IC to send multiple data frames to the THC without SW
388 To simplify the design, SW assumes worst-case memory fragmentation. Therefore,each PRD table shall
390 number of PRD-entries per PRD table.
392 SW allocates up to 128 PRD tables per Read DMA engine as specified in the THC_M_PRT_RPRD_CNTRL.PCD
396 memory 256 PRD entries are required for a single PRD Table. SW writes the number of PRD entries
400 SW allocates all the data buffers and PRD tables only once at host initialization.
415 The write pointer is updated by SW. The write pointer points to location in the DMA CB, where the
416 next PRD table is going to be stored. SW needs to ensure that this pointer rolls over once the
418 depth is equal to 5 entries (0100b), then the write pointers will follow this pattern (SW is
435 interrupt. This bit is set by SW driver.
439 table. This bit is set by SW driver.
447 .. code-block:: c
454 up to 128 PRD tables (except write DMA, write DMA only has one PRD table). SW driver is responsible
465 --------------
467 - Call ACPI _RST method to reset Touch IC device.
468 - Read the reset response from TIC through PIO read.
469 - Issue a command to retrieve device descriptor from Touch IC through PIO write.
470 - Read the device descriptor from Touch IC through PIO read.
471 - If the device descriptor is valid, allocate DMA buffers and configure all DMA channels.
472 - Issue a command to retrieve report descriptor from Touch IC through DMA.
475 --------------------------
479 - Touch IC interrupts the THC Controller using an in-band THC interrupt.
480 - THC Sequencer reads the input report header by transmitting read approval as a signal
482 - THC Sequencer executes a Input Report Body Read operation corresponding to the value
484 - THC DMA engine begins fetching data from the THC Sequencer and writes to host memory
488 - The THC Sequencer checks for the “Last Fragment Flag” bit in the Input Report Header.
490 - If the “Last Fragment Flag” bit is enabled the THC Sequencer enters End-of-Frame Processing.
494 - THC DMA engine increments the read pointer of the Read PRD CB, sets EOF interrupt status
496 - If THC EOF interrupt is enabled by the driver in the control register (THC_M_PRT_READ_DMA_CNTRL_2…
501 - THC QuickSPI driver checks CB write Ptr and CB read Ptr to identify if any data frame in DMA
503 - THC QuickSPI driver gets first unprocessed PRD table.
504 - THC QuickSPI driver scans all PRD entries in this PRD table to calculate the total frame size.
505 - THC QuickSPI driver copies all frame data out.
506 - THC QuickSPI driver checks the data type according to input report body, and calls related
508 - THC QuickSPI driver updates write Ptr.
511 ---------------------------
515 - HID core calls raw_request callback with a request to THC QuickSPI driver.
516 - THC QuickSPI Driver converts request provided data into the output report packet and copies it
518 - Start TxDMA to complete the write operation.
524 --------------
526 - Read device descriptor from Touch IC device through PIO write followed by read.
527 - If the device descriptor is valid, allocate DMA buffers and configure all DMA channels.
528 - Use PIO or TxDMA to write a SET_POWER request to TIC's command register, and check if the
530 - Use PIO or TxDMA to write a RESET request to TIC's command register. If the write operation
532 - Use SWDMA to read report descriptor through TIC's report descriptor register.
535 --------------------------
539 - Touch IC asserts the interrupt indicating that it has an interrupt to send to HOST.
542 - THC Sequencer continues the Read operation as per the size of data indicated in the
544 - THC DMA engine begins fetching data from the THC Sequencer and writes to host memory
549 - THC Sequencer enters End-of-Input Report Processing.
550 - If the device has no more input reports to send to the host, it de-asserts the interrupt
556 - THC DMA engine increments the read pointer of the Read PRD CB, sets EOF interrupt status
558 - If THC EOF interrupt is enabled by the driver in the control register
563 - THC QuickI2C driver checks CB write Ptr and CB read Ptr to identify if any data frame in DMA
565 - THC QuickI2C driver gets first unprocessed PRD table.
566 - THC QuickI2C driver scans all PRD entries in this PRD table to calculate the total frame size.
567 - THC QuickI2C driver copies all frame data out.
568 - THC QuickI2C driver call hid_input_report to send the input report content to HID core, which
571 - THC QuickI2C driver updates write Ptr.
574 ---------------------------
578 - HID core call THC QuickI2C raw_request callback.
579 - THC QuickI2C uses PIO or TXDMA to write a SET_REPORT request to TIC's command register. Report
581 - THC QuickI2C programs TxDMA buffer with TX Data to be written to TIC's data register. The first
595 - HIDSPI: https://download.microsoft.com/download/c/a/0/ca07aef3-3e10-4022-b1e9-c98cea99465d/HidSpi…
596 - HIDI2C: https://download.microsoft.com/download/7/d/d/7dd44bb7-2a7a-4505-ac1c-7227d3d96d5b/hid-ov…