Lines Matching +full:composite +full:- +full:video +full:- +full:connector

5 NVIDIA Tegra SoCs support a set of display, graphics and video functions via
11 supports the built-in GPU, comprised of the gr2d and gr3d engines. Starting
18   - A host1x driver that provides infrastructure and access to the host1x
21   - A KMS driver that supports the display controllers as well as a number of
24   - A set of custom userspace IOCTLs that can be used to submit jobs to the
25     GPU and video engines via host1x.
40 device using a driver-provided function which will set up the bits specific to
48 -------------------------------
50 .. kernel-doc:: include/linux/host1x.h
52 .. kernel-doc:: drivers/gpu/host1x/bus.c
56 --------------------------
58 .. kernel-doc:: drivers/gpu/host1x/syncpt.c
69 -------------------
86 A display controller controls a set of windows that can be used to composite
93 from YUV to RGB at scanout time. This makes them useful for displaying video
98 -------
105 Outputs are modelled as a composite encoder/connector pair.
143 -----------
146 with Tegra-specific flags. This is useful for buffers that should be tiled, or
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166 -------------------------