Lines Matching +full:driving +full:- +full:level
17 A "General Purpose Input/Output" (GPIO) is a flexible software-controlled
25 System-on-Chip (SOC) processors heavily rely on GPIOs. In some cases, every
26 non-dedicated pin can be configured as a GPIO; and most chips have at least
31 Most PC southbridges have a few dozen GPIO-capable pins (with only the BIOS
36 - Output values are writable (high=1, low=0). Some chips also have
38 value might be driven, supporting "wire-OR" and similar schemes for the
41 - Input values are likewise readable (1, 0). Some chips support readback
42 of pins configured as "output", which is very useful in such "wire-OR"
44 input de-glitch/debounce logic, sometimes with software controls.
46 - Inputs can often be used as IRQ signals, often edge triggered but
47 sometimes level triggered. Such IRQs may be configurable as system
50 - Usually a GPIO will be configurable as either input or output, as needed
53 - Most GPIOs can be accessed while holding spinlocks, but those accessed
57 MMC/SD card insertion/removal, detecting card write-protect status, driving
58 a LED, configuring a transceiver, bit-banging a serial bus, poking a hardware
69 Active-High and Active-Low
70 --------------------------
76 being either active-high ("1" means "active", the default) or active-low ("0"
78 not about what happens at the line level.
81 --------------------------
83 level is actually driven), or "open source" (where only the high signal level is
85 used for TTL. A pullup or pulldown resistor causes the high or low signal level.
86 This is sometimes called a "wire-AND"; or more practically, from the negative
87 logic (low=true) perspective this is a "wire-OR".
89 One common example of an open drain signal is a shared active-low IRQ line.
103 The same logic can be applied to emulate open source signaling, by driving the
107 If you are "driving" the signal high but gpiod_get_value(gpio) reports a low
109 driving the shared signal low. That's not necessarily an error. As one common