Lines Matching full:pin
46 Pin object
49 A pin is amorphic object which represents either input or output, it
54 Pin's properties, capabilities and status is provided to the user in
58 Configuration of a pin can be changed by `do` request of netlink
60 Pin handle is a ``DPLL_A_PIN_ID``, it shall be provided to get or set
61 configuration of particular pin in the system. It can be obtained with
63 request, where user provides attributes that result in single pin match.
65 Pin selection
68 In general, selected pin (the one which signal is driving the dpll
70 one pin shall be in ``DPLL_PIN_STATE_CONNECTED`` state for any dpll
73 Pin selection can be done either manually or automatically, depending
76 differences for each mode in terms of available pin states, as well as
80 one of following pin states:
82 - ``DPLL_PIN_STATE_CONNECTED`` - the pin is used to drive dpll device
83 - ``DPLL_PIN_STATE_DISCONNECTED`` - the pin is not used to drive dpll
87 receive one of following pin states:
89 - ``DPLL_PIN_STATE_SELECTABLE`` - the pin shall be considered as valid
91 - ``DPLL_PIN_STATE_DISCONNECTED`` - the pin shall be not considered as
95 pin state ``DPLL_PIN_STATE_CONNECTED`` once automatic selection
101 A single pin object can be attached to multiple dpll devices.
104 1) Set on a pin - the configuration affects all dpll devices pin is
106 2) Set on a pin-dpll tuple - the configuration affects only selected
113 A pin can be MUX-type, it aggregates child pins and serves as a pin
116 Pins registered with a MUX-type pin provide user with additional nested
119 If a pin was registered with multiple parent pins, they behave like a
121 ``DPLL_CMD_PIN_GET`` would contain multiple pin-parent nested
124 'pin': [{{
129 'parent-pin': [
136 Only one child pin can provide its signal to the parent MUX-type pin at
137 a time, the selection is done by requesting change of a child pin state
139 attribute. Example of netlink `set state on parent pin` message format:
142 ``DPLL_A_PIN_ID`` child pin id
144 related to parent pin
145 ``DPLL_A_PIN_PARENT_ID`` parent pin id
146 ``DPLL_A_PIN_STATE`` requested pin state on parent
149 Pin priority
152 Some devices might offer a capability of automatic pin selection mode
156 input pin selection.
158 pin for the device, instead the user shall provide all directly
161 device. Example of netlink `set priority on parent pin` message format:
164 ``DPLL_A_PIN_ID`` configured pin id
168 ``DPLL_A_PIN_PRIO`` requested pin prio on parent dpll
171 Child pin of MUX-type pin is not capable of automatic input pin selection,
172 in order to configure active input of a MUX-type pin, the user needs to
173 request desired pin state of the child pin on the parent pin,
180 on a pin and its parent dpll device. If pin-dpll phase offset measurement
184 Device may also provide ability to adjust a signal phase on a pin.
185 If pin phase adjustment is supported, minimal and maximal values that pin
189 ``DPLL_A_PIN_PHASE_ADJUST`` attribute of a pin, and value change can be
193 ``DPLL_A_PIN_ID`` configured pin id
203 between a pin and parent dpll device
208 phase of signal on pin is earlier in time than dpll's signal. Positive
209 value means that phase of signal on pin is later in time than signal of
221 to embed additional SYNC signal into the base frequency of a pin - a one
227 the pin.
290 The pin related attributes use a ``DPLL_A_PIN_`` prefix and suffix
294 ``DPLL_CMD_PIN_ID_GET`` command to get pin ID
299 ``DPLL_A_PIN_BOARD_LABEL`` attr pin board label provided
301 ``DPLL_A_PIN_PANEL_LABEL`` attr pin panel label provided
303 ``DPLL_A_PIN_PACKAGE_LABEL`` attr pin package label provided
305 ``DPLL_A_PIN_TYPE`` attr type of a pin
309 ``DPLL_CMD_PIN_GET`` command to get pin info or dump
311 ``DPLL_A_PIN_ID`` attr unique a pin ID
316 ``DPLL_A_PIN_BOARD_LABEL`` attr pin board label provided
318 ``DPLL_A_PIN_PANEL_LABEL`` attr pin panel label provided
320 ``DPLL_A_PIN_PACKAGE_LABEL`` attr pin package label provided
322 ``DPLL_A_PIN_TYPE`` attr type of a pin
323 ``DPLL_A_PIN_FREQUENCY`` attr current frequency of a pin
335 the pin is connected with
337 ``DPLL_A_PIN_PRIO`` attr priority of pin on the
339 ``DPLL_A_PIN_STATE`` attr state of pin on the parent
341 ``DPLL_A_PIN_DIRECTION`` attr direction of a pin on the
344 between a pin and parent dpll
345 ``DPLL_A_PIN_PARENT_PIN`` nested attr for each parent pin
346 the pin is connected with
347 ``DPLL_A_PIN_PARENT_ID`` attr parent pin id
348 ``DPLL_A_PIN_STATE`` attr state of pin on the parent
349 pin
350 ``DPLL_A_PIN_CAPABILITIES`` attr bitmask of pin capabilities
355 ``DPLL_A_PIN_ID`` attr unique a pin ID
356 ``DPLL_A_PIN_FREQUENCY`` attr requested frequency of a pin
362 ``DPLL_A_PIN_DIRECTION`` attr requested direction of a pin
363 ``DPLL_A_PIN_PRIO`` attr requested priority of pin on
365 ``DPLL_A_PIN_STATE`` attr requested state of pin on
367 ``DPLL_A_PIN_PARENT_PIN`` nested attr for each parent pin
369 ``DPLL_A_PIN_PARENT_ID`` attr parent pin id
370 ``DPLL_A_PIN_STATE`` attr requested state of pin on
371 parent pin
379 the same format as for their ``do`` request, but every device or pin
389 ``DPLL_CMD_PIN_SET`` - to target a pin user must provide a
390 ``DPLL_A_PIN_ID``, which is unique identifier of a pin in the system.
391 Also configured pin parameters must be added.
393 devices that are connected with the pin, that is why frequency attribute
402 nested attribute and targeted parent pin id in ``DPLL_A_PIN_PARENT_ID``.
427 ``DPLL_CMD_PIN_CREATE_NTF`` dpll pin was created
428 ``DPLL_CMD_PIN_DELETE_NTF`` dpll pin was deleted
429 ``DPLL_CMD_PIN_CHANGE_NTF`` dpll pin has changed
460 A pin can be registered with parent dpll device or parent pin, depending
462 of pin callbacks, and private data pointer for calling them:
464 - dpll_pin_register() - register pin with a dpll device,
465 - dpll_pin_on_pin_register() - register pin with another MUX type pin.
471 Notifications about status changes either of dpll device or a pin are
487 Required pin level callback operations:
490 - ``.state_on_pin_get`` (pins registered with parent pin),
567 This is done by exposing a pin to the netdevice - attaching pin to the
570 Exposed pin id handle ``DPLL_A_PIN_ID`` is then identifiable by the user