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31 memory, but as accesses to a device. Some architectures define devices
32 to be at a fixed address, but most have some method of discovering
34 document does not cover how to receive such an address, but assumes you
154 points to a virtual memory address and can be offset or dereferenced, but in
184   each other, but contain a less expensive barrier operation. A device driver
196   identical behavior, but they can also operate on ``__iomem`` tokens returned
205   These behave in the same way as the ioread32()/iowrite32() family, but with
214   Drivers that use readl()/writel() this way are generally not portable, but
223   on 32-bit architectures but allow two consecutive 32-bit accesses instead.
237   a four-byte __raw_readl() does not get split into individual byte loads, but
239   is only safe to use these to access memory behind a device bus but not MMIO
260   ``__iomem`` pointers, but this is not recommended and device drivers should
266   There are no direct 64-bit I/O port accessors, but pci_iomap() in combination
320   from this memory (it probably goes without saying, but you're also not
345 devices (e.g. buffers or shared memory), but care must be taken as accesses are
350 ``IORESOURCE_PREFETCH``, but it may not be used on those without the flag.
351 For on-chip devices, there is no corresponding flag, but a driver can use
358 but also,
365 cache), but reads may be served from the cache for efficiency. However, it is
373 Like ioremap(), but explicitly requests non-posted write semantics. On some
377 still ordered with respect to other writes and reads from the same device, but
493   Like pci_ioremap_bar()/pci_ioremap_bar(), but also works on I/O space when
498   Like pci_iomap(), but uses devres to automatically unmap the resource when