Lines Matching +full:mt8192 +full:- +full:power
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/usb/mediatek,mtk-xhci.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Chunfeng Yun <chunfeng.yun@mediatek.com>
14 - $ref: usb-xhci.yaml
19 case 2: supports dual-role mode, and the host is based on xHCI driver.
25 - enum:
26 - mediatek,mt2701-xhci
27 - mediatek,mt2712-xhci
28 - mediatek,mt7622-xhci
29 - mediatek,mt7623-xhci
30 - mediatek,mt7629-xhci
31 - mediatek,mt7986-xhci
32 - mediatek,mt7988-xhci
33 - mediatek,mt8173-xhci
34 - mediatek,mt8183-xhci
35 - mediatek,mt8186-xhci
36 - mediatek,mt8188-xhci
37 - mediatek,mt8192-xhci
38 - mediatek,mt8195-xhci
39 - mediatek,mt8365-xhci
40 - const: mediatek,mtk-xhci
45 - description: the registers of xHCI MAC
46 - description: the registers of IP Port Control
48 reg-names:
51 - const: mac
52 - const: ippc # optional, only needed for case 1.
56 use "interrupts-extended" when the interrupts are connected to the
60 - description: xHCI host controller interrupt
61 - description: optional, wakeup interrupt used to support runtime PM
63 interrupt-names:
66 - const: host
67 - const: wakeup
69 power-domains:
70 description: A phandle to USB power domain node to control USB's MTCMOS
76 - description: Controller clock used by normal mode
77 - description: Reference clock used by low power mode etc
78 - description: Mcu bus clock for register access
79 - description: DMA bus clock for data transfer
80 - description: controller clock
81 - description: frame count clock
83 clock-names:
86 - const: sys_ck # required, the following ones are optional
87 - const: ref_ck
88 - const: mcu_ck
89 - const: dma_ck
90 - const: xhci_ck
91 - const: frmcnt_ck
99 - description: USB2/HS PHY # required, others are optional
100 - description: USB3/SS(P) PHY
101 - description: USB2/HS PHY
102 - description: USB3/SS(P) PHY
103 - description: USB2/HS PHY
104 - description: USB3/SS(P) PHY
105 - description: USB2/HS PHY
106 - description: USB3/SS(P) PHY
107 - description: USB2/HS PHY
109 vusb33-supply:
112 vbus-supply:
118 usb3-lpm-capable: true
120 usb2-lpm-disable: true
122 imod-interval-ns:
128 rx-fifo-depth:
131 It is a quirk used to work around Gen1 isoc-in endpoint transfer issue
135 the side-effect is that it may cause performance drop about 10%,
140 wakeup-source:
141 description: enable USB remote wakeup, see power/wakeup-source.txt
144 mediatek,syscon-wakeup:
145 $ref: /schemas/types.yaml#/definitions/phandle-array
152 - description:
154 - description:
157 - description: |
159 1 - used by mt8173 etc, revision 1 without following IPM rule;
160 2 - used by mt2712 etc, revision 2 following IPM rule;
161 101 - used by mt8183, specific 1.01;
162 102 - used by mt8192, specific 1.02;
163 103 - used by mt8195, IP0, specific 1.03;
164 104 - used by mt8195, IP1, specific 1.04;
165 105 - used by mt8195, IP2, specific 1.05;
166 106 - used by mt8195, IP3, specific 1.06;
169 mediatek,u3p-dis-msk:
174 mediatek,u2p-dis-msk:
179 "#address-cells":
182 "#size-cells":
186 "@[0-9a-f]{1}$":
191 wakeup-source: [ 'mediatek,syscon-wakeup' ]
194 - compatible
195 - reg
196 - reg-names
197 - interrupts
198 - clocks
199 - clock-names
204 - |
205 #include <dt-bindings/clock/mt8173-clk.h>
206 #include <dt-bindings/interrupt-controller/arm-gic.h>
207 #include <dt-bindings/interrupt-controller/irq.h>
208 #include <dt-bindings/phy/phy.h>
209 #include <dt-bindings/power/mt8173-power.h>
212 compatible = "mediatek,mt8173-xhci", "mediatek,mtk-xhci";
214 reg-names = "mac", "ippc";
216 power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
218 clock-names = "sys_ck", "ref_ck";
220 vusb33-supply = <&mt6397_vusb_reg>;
221 vbus-supply = <&usb_p1_vbus>;
222 imod-interval-ns = <10000>;
223 mediatek,syscon-wakeup = <&pericfg 0x400 1>;
224 wakeup-source;
225 usb3-lpm-capable;