Lines Matching +full:phy +full:- +full:cadence
1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Cadence USBSS-DRD controller
10 - Pawel Laszczak <pawell@cadence.com>
18 - description: OTG controller registers
19 - description: XHCI Host controller registers
20 - description: DEVICE controller registers
22 reg-names:
24 - const: otg
25 - const: xhci
26 - const: dev
31 - description: XHCI host controller interrupt
32 - description: Device controller interrupt
33 - description: OTG/DRD controller interrupt
34 - description: interrupt used to wake up core, e.g when usbcmd.rs is
37 interrupt-names:
40 - const: host
41 - const: peripheral
42 - const: otg
43 - const: wakeup
48 This port is used with the 'usb-role-switch' property to connect the
51 maximum-speed:
52 enum: [super-speed, high-speed, full-speed]
58 phy-names:
63 - const: cdns3,usb2-phy
64 - const: cdns3,usb3-phy
66 cdns,on-chip-buff-size:
72 cdns,phyrst-a-enable:
73 description: Enable resetting of PHY if Rx fail is detected
77 port: [ usb-role-switch ]
80 - compatible
81 - reg
82 - reg-names
83 - interrupts
84 - interrupt-names
87 - $ref: usb-drd.yaml#
92 - |
93 #include <dt-bindings/interrupt-controller/arm-gic.h>
95 #address-cells = <2>;
96 #size-cells = <2>;
103 reg-names = "otg", "xhci", "dev";
107 interrupt-names = "host", "peripheral", "otg";
108 maximum-speed = "super-speed";