Lines Matching +full:rcar +full:- +full:gen2 +full:- +full:cmt0
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Geert Uytterhoeven <geert+renesas@glider.be>
11 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
14 The CMT is a multi-channel 16/32/48-bit timer/counter with configurable clock
26 - items:
27 - enum:
28 - renesas,r8a7740-cmt0 # 32-bit CMT0 on R-Mobile A1
29 - renesas,r8a7740-cmt1 # 48-bit CMT1 on R-Mobile A1
30 - renesas,r8a7740-cmt2 # 32-bit CMT2 on R-Mobile A1
31 - renesas,r8a7740-cmt3 # 32-bit CMT3 on R-Mobile A1
32 - renesas,r8a7740-cmt4 # 32-bit CMT4 on R-Mobile A1
33 - renesas,sh73a0-cmt0 # 32-bit CMT0 on SH-Mobile AG5
34 - renesas,sh73a0-cmt1 # 48-bit CMT1 on SH-Mobile AG5
35 - renesas,sh73a0-cmt2 # 32-bit CMT2 on SH-Mobile AG5
36 - renesas,sh73a0-cmt3 # 32-bit CMT3 on SH-Mobile AG5
37 - renesas,sh73a0-cmt4 # 32-bit CMT4 on SH-Mobile AG5
39 - items:
40 - enum:
41 - renesas,r8a73a4-cmt0 # 32-bit CMT0 on R-Mobile APE6
42 - renesas,r8a7742-cmt0 # 32-bit CMT0 on RZ/G1H
43 - renesas,r8a7743-cmt0 # 32-bit CMT0 on RZ/G1M
44 - renesas,r8a7744-cmt0 # 32-bit CMT0 on RZ/G1N
45 - renesas,r8a7745-cmt0 # 32-bit CMT0 on RZ/G1E
46 - renesas,r8a77470-cmt0 # 32-bit CMT0 on RZ/G1C
47 - renesas,r8a7790-cmt0 # 32-bit CMT0 on R-Car H2
48 - renesas,r8a7791-cmt0 # 32-bit CMT0 on R-Car M2-W
49 - renesas,r8a7792-cmt0 # 32-bit CMT0 on R-Car V2H
50 - renesas,r8a7793-cmt0 # 32-bit CMT0 on R-Car M2-N
51 - renesas,r8a7794-cmt0 # 32-bit CMT0 on R-Car E2
52 - const: renesas,rcar-gen2-cmt0 # 32-bit CMT0 on R-Mobile APE6, R-Car Gen2 and RZ/G1
54 - items:
55 - enum:
56 - renesas,r8a73a4-cmt1 # 48-bit CMT1 on R-Mobile APE6
57 - renesas,r8a7742-cmt1 # 48-bit CMT1 on RZ/G1H
58 - renesas,r8a7743-cmt1 # 48-bit CMT1 on RZ/G1M
59 - renesas,r8a7744-cmt1 # 48-bit CMT1 on RZ/G1N
60 - renesas,r8a7745-cmt1 # 48-bit CMT1 on RZ/G1E
61 - renesas,r8a77470-cmt1 # 48-bit CMT1 on RZ/G1C
62 - renesas,r8a7790-cmt1 # 48-bit CMT1 on R-Car H2
63 - renesas,r8a7791-cmt1 # 48-bit CMT1 on R-Car M2-W
64 - renesas,r8a7792-cmt1 # 48-bit CMT1 on R-Car V2H
65 - renesas,r8a7793-cmt1 # 48-bit CMT1 on R-Car M2-N
66 - renesas,r8a7794-cmt1 # 48-bit CMT1 on R-Car E2
67 - const: renesas,rcar-gen2-cmt1 # 48-bit CMT1 on R-Mobile APE6, R-Car Gen2 and RZ/G1
69 - items:
70 - enum:
71 - renesas,r8a774a1-cmt0 # 32-bit CMT0 on RZ/G2M
72 - renesas,r8a774b1-cmt0 # 32-bit CMT0 on RZ/G2N
73 - renesas,r8a774c0-cmt0 # 32-bit CMT0 on RZ/G2E
74 - renesas,r8a774e1-cmt0 # 32-bit CMT0 on RZ/G2H
75 - renesas,r8a7795-cmt0 # 32-bit CMT0 on R-Car H3
76 - renesas,r8a7796-cmt0 # 32-bit CMT0 on R-Car M3-W
77 - renesas,r8a77961-cmt0 # 32-bit CMT0 on R-Car M3-W+
78 - renesas,r8a77965-cmt0 # 32-bit CMT0 on R-Car M3-N
79 - renesas,r8a77970-cmt0 # 32-bit CMT0 on R-Car V3M
80 - renesas,r8a77980-cmt0 # 32-bit CMT0 on R-Car V3H
81 - renesas,r8a77990-cmt0 # 32-bit CMT0 on R-Car E3
82 - renesas,r8a77995-cmt0 # 32-bit CMT0 on R-Car D3
83 - const: renesas,rcar-gen3-cmt0 # 32-bit CMT0 on R-Car Gen3 and RZ/G2
85 - items:
86 - enum:
87 - renesas,r8a774a1-cmt1 # 48-bit CMT on RZ/G2M
88 - renesas,r8a774b1-cmt1 # 48-bit CMT on RZ/G2N
89 - renesas,r8a774c0-cmt1 # 48-bit CMT on RZ/G2E
90 - renesas,r8a774e1-cmt1 # 48-bit CMT on RZ/G2H
91 - renesas,r8a7795-cmt1 # 48-bit CMT on R-Car H3
92 - renesas,r8a7796-cmt1 # 48-bit CMT on R-Car M3-W
93 - renesas,r8a77961-cmt1 # 48-bit CMT on R-Car M3-W+
94 - renesas,r8a77965-cmt1 # 48-bit CMT on R-Car M3-N
95 - renesas,r8a77970-cmt1 # 48-bit CMT on R-Car V3M
96 - renesas,r8a77980-cmt1 # 48-bit CMT on R-Car V3H
97 - renesas,r8a77990-cmt1 # 48-bit CMT on R-Car E3
98 - renesas,r8a77995-cmt1 # 48-bit CMT on R-Car D3
99 - const: renesas,rcar-gen3-cmt1 # 48-bit CMT on R-Car Gen3 and RZ/G2
101 - items:
102 - enum:
103 - renesas,r8a779a0-cmt0 # 32-bit CMT0 on R-Car V3U
104 - renesas,r8a779f0-cmt0 # 32-bit CMT0 on R-Car S4-8
105 - renesas,r8a779g0-cmt0 # 32-bit CMT0 on R-Car V4H
106 - renesas,r8a779h0-cmt0 # 32-bit CMT0 on R-Car V4M
107 - const: renesas,rcar-gen4-cmt0 # 32-bit CMT0 on R-Car Gen4
109 - items:
110 - enum:
111 - renesas,r8a779a0-cmt1 # 48-bit CMT on R-Car V3U
112 - renesas,r8a779f0-cmt1 # 48-bit CMT on R-Car S4-8
113 - renesas,r8a779g0-cmt1 # 48-bit CMT on R-Car V4H
114 - renesas,r8a779h0-cmt1 # 48-bit CMT on R-Car V4M
115 - const: renesas,rcar-gen4-cmt1 # 48-bit CMT on R-Car Gen4
127 clock-names:
130 power-domains:
137 - compatible
138 - reg
139 - interrupts
140 - clocks
141 - clock-names
142 - power-domains
145 - if:
150 - renesas,rcar-gen2-cmt0
151 - renesas,rcar-gen3-cmt0
152 - renesas,rcar-gen4-cmt0
159 - if:
164 - renesas,rcar-gen2-cmt1
165 - renesas,rcar-gen3-cmt1
166 - renesas,rcar-gen4-cmt1
176 - |
177 #include <dt-bindings/clock/r8a7790-cpg-mssr.h>
178 #include <dt-bindings/interrupt-controller/arm-gic.h>
179 #include <dt-bindings/power/r8a7790-sysc.h>
180 cmt0: timer@ffca0000 {
181 compatible = "renesas,r8a7790-cmt0", "renesas,rcar-gen2-cmt0";
186 clock-names = "fck";
187 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
192 compatible = "renesas,r8a7790-cmt1", "renesas,rcar-gen2-cmt1";
203 clock-names = "fck";
204 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;