Lines Matching +full:tsens +full:- +full:v1
1 # SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 ---
5 $id: http://devicetree.org/schemas/thermal/qcom-tsens.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: QCOM SoC Temperature Sensor (TSENS)
11 - Amit Kucheria <amitk@kernel.org>
14 QCOM SoCs have TSENS IP to allow temperature measurement. There are currently
16 The IP versions are named v0.1, v1 and v2 in the driver, where v0.1 captures
17 everything before v1 when there was no versioning information.
22 - description: msm8960 TSENS based
24 - enum:
25 - qcom,ipq8064-tsens
26 - qcom,msm8960-tsens
28 - description: v0.1 of TSENS
30 - enum:
31 - qcom,mdm9607-tsens
32 - qcom,msm8226-tsens
33 - qcom,msm8909-tsens
34 - qcom,msm8916-tsens
35 - qcom,msm8939-tsens
36 - qcom,msm8974-tsens
37 - const: qcom,tsens-v0_1
39 - description:
40 v1 of TSENS without RPM which requires to be explicitly reset
43 - qcom,ipq5018-tsens
45 - description: v1 of TSENS
47 - enum:
48 - qcom,msm8937-tsens
49 - qcom,msm8956-tsens
50 - qcom,msm8976-tsens
51 - qcom,qcs404-tsens
52 - const: qcom,tsens-v1
54 - description: v2 of TSENS
56 - enum:
57 - qcom,glymur-tsens
58 - qcom,kaanapali-tsens
59 - qcom,milos-tsens
60 - qcom,msm8953-tsens
61 - qcom,msm8996-tsens
62 - qcom,msm8998-tsens
63 - qcom,qcm2290-tsens
64 - qcom,qcs8300-tsens
65 - qcom,qcs615-tsens
66 - qcom,sa8255p-tsens
67 - qcom,sa8775p-tsens
68 - qcom,sar2130p-tsens
69 - qcom,sc7180-tsens
70 - qcom,sc7280-tsens
71 - qcom,sc8180x-tsens
72 - qcom,sc8280xp-tsens
73 - qcom,sdm630-tsens
74 - qcom,sdm845-tsens
75 - qcom,sm6115-tsens
76 - qcom,sm6350-tsens
77 - qcom,sm6375-tsens
78 - qcom,sm8150-tsens
79 - qcom,sm8250-tsens
80 - qcom,sm8350-tsens
81 - qcom,sm8450-tsens
82 - qcom,sm8550-tsens
83 - qcom,sm8650-tsens
84 - qcom,x1e80100-tsens
85 - const: qcom,tsens-v2
87 - description: v2 of TSENS with combined interrupt
89 - qcom,ipq5332-tsens
90 - qcom,ipq5424-tsens
91 - qcom,ipq8074-tsens
93 - description: v2 of TSENS with combined interrupt
95 - enum:
96 - qcom,ipq6018-tsens
97 - qcom,ipq9574-tsens
98 - const: qcom,ipq8074-tsens
102 - description: TM registers
103 - description: SROT registers
109 interrupt-names:
113 nvmem-cells:
115 - minItems: 1
119 - minItems: 5
125 - maxItems: 51
130 nvmem-cell-names:
132 - minItems: 1
134 - const: calib
135 - enum:
136 - calib_backup
137 - calib_sel
138 - minItems: 5
140 - const: mode
141 - const: base1
142 - const: base2
143 - pattern: '^s[0-9]+_p1$'
144 - pattern: '^s[0-9]+_p2$'
145 - pattern: '^s[0-9]+_p1$'
146 - pattern: '^s[0-9]+_p2$'
147 - pattern: '^s[0-9]+_p1$'
148 - pattern: '^s[0-9]+_p2$'
149 - pattern: '^s[0-9]+_p1$'
150 - pattern: '^s[0-9]+_p2$'
151 - pattern: '^s[0-9]+_p1$'
152 - pattern: '^s[0-9]+_p2$'
153 - pattern: '^s[0-9]+_p1$'
154 - pattern: '^s[0-9]+_p2$'
155 - pattern: '^s[0-9]+_p1$'
156 - pattern: '^s[0-9]+_p2$'
157 - pattern: '^s[0-9]+_p1$'
158 - pattern: '^s[0-9]+_p2$'
159 - pattern: '^s[0-9]+_p1$'
160 - pattern: '^s[0-9]+_p2$'
161 - pattern: '^s[0-9]+_p1$'
162 - pattern: '^s[0-9]+_p2$'
163 - pattern: '^s[0-9]+_p1$'
164 - pattern: '^s[0-9]+_p2$'
165 - pattern: '^s[0-9]+_p1$'
166 - pattern: '^s[0-9]+_p2$'
167 - pattern: '^s[0-9]+_p1$'
168 - pattern: '^s[0-9]+_p2$'
169 - pattern: '^s[0-9]+_p1$'
170 - pattern: '^s[0-9]+_p2$'
171 - pattern: '^s[0-9]+_p1$'
172 - pattern: '^s[0-9]+_p2$'
173 - pattern: '^s[0-9]+_p1$'
174 - pattern: '^s[0-9]+_p2$'
176 - items:
177 - const: mode
178 - const: base1
179 - const: base2
180 - const: use_backup
181 - const: mode_backup
182 - const: base1_backup
183 - const: base2_backup
184 - const: s0_p1
185 - const: s0_p2
186 - const: s1_p1
187 - const: s1_p2
188 - const: s2_p1
189 - const: s2_p2
190 - const: s3_p1
191 - const: s3_p2
192 - const: s4_p1
193 - const: s4_p2
194 - const: s5_p1
195 - const: s5_p2
196 - const: s6_p1
197 - const: s6_p2
198 - const: s7_p1
199 - const: s7_p2
200 - const: s8_p1
201 - const: s8_p2
202 - const: s9_p1
203 - const: s9_p2
204 - const: s10_p1
205 - const: s10_p2
206 - const: s0_p1_backup
207 - const: s0_p2_backup
208 - const: s1_p1_backup
209 - const: s1_p2_backup
210 - const: s2_p1_backup
211 - const: s2_p2_backup
212 - const: s3_p1_backup
213 - const: s3_p2_backup
214 - const: s4_p1_backup
215 - const: s4_p2_backup
216 - const: s5_p1_backup
217 - const: s5_p2_backup
218 - const: s6_p1_backup
219 - const: s6_p2_backup
220 - const: s7_p1_backup
221 - const: s7_p2_backup
222 - const: s8_p1_backup
223 - const: s8_p2_backup
224 - const: s9_p1_backup
225 - const: s9_p2_backup
226 - const: s10_p1_backup
227 - const: s10_p2_backup
228 - minItems: 8
230 - const: mode
231 - const: base0
232 - const: base1
233 - pattern: '^tsens_sens[0-9]+_off$'
234 - pattern: '^tsens_sens[0-9]+_off$'
235 - pattern: '^tsens_sens[0-9]+_off$'
236 - pattern: '^tsens_sens[0-9]+_off$'
237 - pattern: '^tsens_sens[0-9]+_off$'
238 - pattern: '^tsens_sens[0-9]+_off$'
239 - pattern: '^tsens_sens[0-9]+_off$'
248 "#thermal-sensor-cells":
252 - compatible
253 - interrupts
254 - interrupt-names
255 - "#qcom,sensors"
258 - $ref: thermal-sensor.yaml#
260 - if:
265 - qcom,ipq5018-tsens
266 - qcom,ipq8064-tsens
267 - qcom,msm8960-tsens
268 - qcom,tsens-v0_1
269 - qcom,tsens-v1
274 - description: Combined interrupt if upper or lower threshold crossed
275 interrupt-names:
277 - const: uplow
279 - if:
283 const: qcom,tsens-v2
288 - description: Combined interrupt if upper or lower threshold crossed
289 - description: Interrupt if critical threshold crossed
290 interrupt-names:
292 - const: uplow
293 - const: critical
295 - if:
300 - qcom,ipq5332-tsens
301 - qcom,ipq5424-tsens
302 - qcom,ipq8074-tsens
307 - description: Combined interrupt if upper, lower or critical thresholds crossed
308 interrupt-names:
310 - const: combined
312 - if:
317 - qcom,ipq5332-tsens
318 - qcom,ipq5424-tsens
319 - qcom,ipq8074-tsens
320 - qcom,tsens-v0_1
321 - qcom,tsens-v1
322 - qcom,tsens-v2
326 - reg
331 - |
332 #include <dt-bindings/interrupt-controller/arm-gic.h>
333 thermal-sensor {
334 compatible = "qcom,ipq8064-tsens";
336 nvmem-cells = <&tsens_calib>, <&tsens_calib_backup>;
337 nvmem-cell-names = "calib", "calib_backup";
339 interrupt-names = "uplow";
342 #thermal-sensor-cells = <1>;
345 - |
346 #include <dt-bindings/interrupt-controller/arm-gic.h>
347 // Example 1 (new calibration data: for pre v1 IP):
348 thermal-sensor@4a9000 {
349 compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1";
353 nvmem-cells = <&tsens_mode>,
360 nvmem-cell-names = "mode",
369 interrupt-names = "uplow";
372 #thermal-sensor-cells = <1>;
375 - |
376 #include <dt-bindings/interrupt-controller/arm-gic.h>
377 // Example 1 (legacy: for pre v1 IP):
378 tsens1: thermal-sensor@4a9000 {
379 compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1";
383 nvmem-cells = <&tsens_caldata>, <&tsens_calsel>;
384 nvmem-cell-names = "calib", "calib_sel";
387 interrupt-names = "uplow";
390 #thermal-sensor-cells = <1>;
393 - |
394 #include <dt-bindings/interrupt-controller/arm-gic.h>
395 // Example 2 (for any platform containing v1 of the TSENS IP):
396 tsens2: thermal-sensor@4a9000 {
397 compatible = "qcom,qcs404-tsens", "qcom,tsens-v1";
401 nvmem-cells = <&tsens_caldata>;
402 nvmem-cell-names = "calib";
405 interrupt-names = "uplow";
408 #thermal-sensor-cells = <1>;
411 - |
412 #include <dt-bindings/interrupt-controller/arm-gic.h>
413 // Example 3 (for any platform containing v2 of the TSENS IP):
414 tsens3: thermal-sensor@c263000 {
415 compatible = "qcom,sdm845-tsens", "qcom,tsens-v2";
421 interrupt-names = "uplow", "critical";
424 #thermal-sensor-cells = <1>;
427 - |
428 #include <dt-bindings/interrupt-controller/arm-gic.h>
429 // Example 4 (for any IPQ8074 based SoC-s):
430 tsens4: thermal-sensor@4a9000 {
431 compatible = "qcom,ipq8074-tsens";
436 interrupt-names = "combined";
439 #thermal-sensor-cells = <1>;