Lines Matching +full:mx8dxl +full:- +full:evk
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-fsl-lpspi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawnguo@kernel.org>
11 - Sascha Hauer <s.hauer@pengutronix.de>
12 - Fabio Estevam <festevam@gmail.com>
15 - $ref: /schemas/spi/spi-controller.yaml#
20 - enum:
21 - fsl,imx7ulp-spi
22 - fsl,imx8qxp-spi
23 - items:
24 - enum:
25 - fsl,imx8ulp-spi
26 - fsl,imx93-spi
27 - fsl,imx95-spi
28 - const: fsl,imx7ulp-spi
37 - description: SoC SPI per clock
38 - description: SoC SPI ipg clock
40 clock-names:
42 - const: per
43 - const: ipg
47 - description: TX DMA Channel
48 - description: RX DMA Channel
50 dma-names:
52 - const: tx
53 - const: rx
55 fsl,spi-only-use-cs1-sel:
58 i.MX8DXL-EVK board only uses CS1 without using CS0. Therefore, add
59 this property to re-config the chipselect value in the LPSPI driver.
62 num-cs:
69 power-domains:
73 - compatible
74 - reg
75 - interrupts
76 - clocks
77 - clock-names
82 - |
83 #include <dt-bindings/clock/imx7ulp-clock.h>
84 #include <dt-bindings/interrupt-controller/arm-gic.h>
87 compatible = "fsl,imx7ulp-spi";
89 interrupt-parent = <&intc>;
93 clock-names = "per", "ipg";
94 spi-slave;
95 fsl,spi-only-use-cs1-sel;
96 num-cs = <2>;