Lines Matching +full:chip +full:- +full:selects

6 FIU0 and FIUx supports two chip selects,
7 FIU3 support four chip select.
10 FIU0 and FIUx supports two chip selects,
11 FIU1 and FIU3 supports four chip selects.
14   - compatible : "nuvoton,npcm750-fiu" for Poleg NPCM7XX BMC
15 			     "nuvoton,npcm845-fiu" for Arbel NPCM8XX BMC
16   - #address-cells : should be 1.
17   - #size-cells : should be 0.
18   - reg : the first contains the register location and length,
20   - reg-names: Should contain the reg names "control" and "memory"
21   - clocks : phandle of FIU reference clock.
24   - pinctrl-names : a pinctrl state named "default" must be defined.
25   - pinctrl-0 : phandle referencing pin configuration of the device.
28   - nuvoton,spix-mode: enable spix-mode for an expansion bus to an ASIC or CPLD.
31 - All the FIU controller nodes should be represented in the aliases node using
46 	compatible = "nuvoton,npcm750-fiu";
47 	#address-cells = <1>;
48 	#size-cells = <0>;
50 	reg-names = "control", "memory";
52 	pinctrl-names = "default";
53 	pinctrl-0 = <&spi3_pins>;