Lines Matching +full:axi +full:- +full:spi +full:- +full:engine +full:- +full:1
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/adi,axi-spi-engine.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Analog Devices AXI SPI Engine Controller
10 The AXI SPI Engine controller is part of the SPI Engine framework[1] and
11 allows memory mapped access to the SPI Engine control bus. This allows it
12 to be used as a general purpose software driven SPI controller as well as
15 [1] https://wiki.analog.com/resources/fpga/peripherals/spi_engine
18 - Michael Hennerich <Michael.Hennerich@analog.com>
19 - Nuno Sá <nuno.sa@analog.com>
22 - $ref: /schemas/spi/spi-controller.yaml#
26 const: adi,axi-spi-engine-1.00.a
29 maxItems: 1
32 maxItems: 1
36 - description: The AXI interconnect clock.
37 - description: The SPI controller clock.
39 clock-names:
41 - const: s_axi_aclk
42 - const: spi_clk
45 - compatible
46 - reg
47 - interrupts
48 - clocks
49 - clock-names
54 - |
55 spi@44a00000 {
56 compatible = "adi,axi-spi-engine-1.00.a";
60 clock-names = "s_axi_aclk", "spi_clk";
62 #address-cells = <1>;
63 #size-cells = <0>;
65 /* SPI devices */