Lines Matching +full:sc7280 +full:- +full:lpassaudiocc
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
11 - Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
19 - qcom,soundwire-v1.3.0
20 - qcom,soundwire-v1.5.0
21 - qcom,soundwire-v1.5.1
22 - qcom,soundwire-v1.6.0
23 - qcom,soundwire-v1.7.0
24 - qcom,soundwire-v2.0.0
32 - description: specify the SoundWire controller core.
33 - description: specify the Soundwire controller wake IRQ.
35 interrupt-names:
38 - const: core
39 - const: wakeup
43 - description: iface clock
45 clock-names:
47 - const: iface
51 - description: SWR_AUDIO_CGCR RESET
53 reset-names:
55 - const: swr_audio_cgcr
57 '#sound-dai-cells':
60 '#address-cells':
63 '#size-cells':
66 wakeup-source: true
68 qcom,din-ports:
72 qcom,dout-ports:
76 qcom,ports-word-length:
77 $ref: /schemas/types.yaml#/definitions/uint8-array
86 qcom,ports-sinterval-low:
87 $ref: /schemas/types.yaml#/definitions/uint8-array
97 qcom,ports-sinterval:
98 $ref: /schemas/types.yaml#/definitions/uint16-array
108 qcom,ports-offset1:
109 $ref: /schemas/types.yaml#/definitions/uint8-array
119 qcom,ports-offset2:
120 $ref: /schemas/types.yaml#/definitions/uint8-array
130 qcom,ports-lane-control:
131 $ref: /schemas/types.yaml#/definitions/uint8-array
141 qcom,ports-block-pack-mode:
142 $ref: /schemas/types.yaml#/definitions/uint8-array
155 - minimum: 0
157 - const: 0xff
159 qcom,ports-hstart:
160 $ref: /schemas/types.yaml#/definitions/uint8-array
163 i.e. left edge of the Transport sub-frame for each port.
172 - minimum: 0
174 - const: 0xff
176 qcom,ports-hstop:
177 $ref: /schemas/types.yaml#/definitions/uint8-array
181 sub-frame for each port. Out ports followed by In ports.
189 - minimum: 0
191 - const: 0xff
193 qcom,ports-block-group-count:
194 $ref: /schemas/types.yaml#/definitions/uint8-array
205 - minimum: 0
207 - const: 0xff
213 - compatible
214 - reg
215 - interrupts
216 - clocks
217 - clock-names
218 - '#sound-dai-cells'
219 - '#address-cells'
220 - '#size-cells'
221 - qcom,dout-ports
222 - qcom,din-ports
223 - qcom,ports-offset1
224 - qcom,ports-offset2
227 - required:
228 - qcom,ports-sinterval-low
229 - required:
230 - qcom,ports-sinterval
233 - $ref: soundwire-controller.yaml#
238 - |
239 #include <dt-bindings/interrupt-controller/arm-gic.h>
240 #include <dt-bindings/interrupt-controller/irq.h>
241 #include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h>
244 compatible = "qcom,soundwire-v1.6.0";
250 interrupt-names = "core", "wakeup";
253 clock-names = "iface";
255 qcom,din-ports = <0>;
256 qcom,dout-ports = <5>;
259 reset-names = "swr_audio_cgcr";
261 qcom,ports-word-length = /bits/ 8 <0x01 0x07 0x04 0xff 0xff>;
262 qcom,ports-sinterval-low = /bits/ 8 <0x03 0x3f 0x1f 0x03 0x03>;
263 qcom,ports-offset1 = /bits/ 8 <0x00 0x00 0x0b 0x01 0x01>;
264 qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x0b 0x00 0x00>;
265 qcom,ports-lane-control = /bits/ 8 <0x01 0x00 0x00 0x00 0x00>;
266 qcom,ports-block-pack-mode = /bits/ 8 <0xff 0x00 0x01 0xff 0xff>;
267 qcom,ports-hstart = /bits/ 8 <0xff 0x03 0xff 0xff 0xff>;
268 qcom,ports-hstop = /bits/ 8 <0xff 0x06 0xff 0xff 0xff>;
269 qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0xff 0xff 0x00>;
271 #sound-dai-cells = <1>;
272 #address-cells = <2>;
273 #size-cells = <0>;
278 qcom,rx-port-mapping = <1 2 3 4 5>;