Lines Matching +full:codec +full:- +full:mclk1
1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
11 - patches@opensource.cirrus.com
25 - wlf,wm1811
26 - wlf,wm8994
27 - wlf,wm8958
36 clock-names:
39 - const: MCLK1
40 - const: MCLK2
42 gpio-controller: true
44 '#gpio-cells':
50 interrupt-controller: true
52 '#interrupt-cells':
58 AVDD1-supply: true
59 AVDD2-supply: true
60 CPVDD-supply: true
61 DBVDD-supply: true
62 DBVDD1-supply: true
63 DBVDD2-supply: true
64 DBVDD3-supply: true
65 DCVDD-supply: true
66 LDO1VDD-supply: true
67 LDO2VDD-supply: true
68 SPKVDD1-supply: true
69 SPKVDD2-supply: true
71 '#sound-dai-cells':
74 wlf,gpio-cfg:
75 $ref: /schemas/types.yaml#/definitions/uint32-array
82 wlf,micbias-cfg:
83 $ref: /schemas/types.yaml#/definitions/uint32-array
89 wlf,ldo1ena-gpios:
94 wlf,ldo2ena-gpios:
99 wlf,lineout1-se:
104 wlf,lineout2-se:
109 wlf,lineout1-feedback:
114 wlf,lineout2-feedback:
119 wlf,ldoena-always-driven:
124 wlf,spkmode-pu:
127 Enable the internal pull-up resistor on the SPKMODE pin.
129 wlf,csnaddr-pd:
132 Enable the internal pull-down resistor on the CS/ADDR pin.
135 - compatible
136 - reg
137 - AVDD2-supply
138 - CPVDD-supply
139 - SPKVDD1-supply
140 - SPKVDD2-supply
143 - $ref: dai-common.yaml#
144 - if:
148 - wlf,wm1811
149 - wlf,wm8958
152 DBVDD-supply: false
153 LDO2VDD-supply: false
155 - DBVDD1-supply
156 - DBVDD2-supply
157 - DBVDD3-supply
160 DBVDD1-supply: false
161 DBVDD2-supply: false
162 DBVDD3-supply: false
164 - DBVDD-supply
169 - |
170 #include <dt-bindings/gpio/gpio.h>
173 #address-cells = <1>;
174 #size-cells = <0>;
176 audio-codec@1a {
180 clock-names = "MCLK1";
182 AVDD2-supply = <&main_dc_reg>;
183 CPVDD-supply = <&main_dc_reg>;
184 DBVDD1-supply = <&main_dc_reg>;
185 DBVDD2-supply = <&main_dc_reg>;
186 DBVDD3-supply = <&main_dc_reg>;
187 LDO1VDD-supply = <&main_dc_reg>;
188 SPKVDD1-supply = <&main_dc_reg>;
189 SPKVDD2-supply = <&main_dc_reg>;
191 wlf,ldo1ena-gpios = <&gpb0 0 GPIO_ACTIVE_HIGH>;
192 wlf,ldo2ena-gpios = <&gpb0 1 GPIO_ACTIVE_HIGH>;