Lines Matching +full:micbias1 +full:- +full:vg

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ricard Wanderlof <ricardw@axis.com>
18 - $ref: dai-common.yaml#
23 - ti,tlv320adc3001
24 - ti,tlv320adc3101
30 '#sound-dai-cells':
33 '#gpio-cells':
36 gpio-controller: true
38 reset-gpios:
46 ti,dmdin-gpio1:
49 - 0 # ADC3XXX_GPIO_DISABLED - I/O buffers powered down and not used
50 - 1 # ADC3XXX_GPIO_INPUT - Various non-GPIO input functions
51 - 2 # ADC3XXX_GPIO_GPI - General purpose input
52 - 3 # ADC3XXX_GPIO_GPO - General purpose output
53 - 4 # ADC3XXX_GPIO_CLKOUT - Clock source set in CLKOUT_MUX reg
54 - 5 # ADC3XXX_GPIO_INT1 - INT1 output
55 - 6 # ADC3XXX_GPIO_SECONDARY_BCLK - Codec interface secondary BCLK
56 - 7 # ADC3XXX_GPIO_SECONDARY_WCLK - Codec interface secondary WCLK
64 ti,dmclk-gpio2:
67 - 0 # ADC3XXX_GPIO_DISABLED - I/O buffers powered down and not used
68 - 1 # ADC3XXX_GPIO_INPUT - Various non-GPIO input functions
69 - 2 # ADC3XXX_GPIO_GPI - General purpose input
70 - 3 # ADC3XXX_GPIO_GPO - General purpose output
71 - 4 # ADC3XXX_GPIO_CLKOUT - Clock source set in CLKOUT_MUX reg
72 - 5 # ADC3XXX_GPIO_INT1 - INT1 output
73 - 6 # ADC3XXX_GPIO_SECONDARY_BCLK - Codec interface secondary BCLK
74 - 7 # ADC3XXX_GPIO_SECONDARY_WCLK - Codec interface secondary WCLK
85 ti,micbias1-gpo:
88 When set, the MICBIAS1 pin may be controlled via the GPIO framework,
92 specified by the ti,micbias1-vg property. When deactivated, the pin will
95 ti,micbias2-gpo:
102 specified by the ti,micbias2-vg property. When deactivated, the pin will
105 ti,micbias1-vg:
108 - 0 # ADC3XXX_MICBIAS_OFF - Mic bias is powered down
109 - 1 # ADC3XXX_MICBIAS_2_0V - Mic bias is set to 2.0V
110 - 2 # ADC3XXX_MICBIAS_2_5V - Mic bias is set to 2.5V
111 - 3 # ADC3XXX_MICBIAS_AVDD - Mic bias is same as AVDD supply
114 Mic bias voltage output on MICBIAS1 pin
116 ti,micbias2-vg:
119 - 0 # ADC3XXX_MICBIAS_OFF - Mic bias is powered down
120 - 1 # ADC3XXX_MICBIAS_2_0V - Mic bias is set to 2.0V
121 - 2 # ADC3XXX_MICBIAS_2_5V - Mic bias is set to 2.5V
122 - 3 # ADC3XXX_MICBIAS_AVDD - Mic bias is same as AVDD supply
128 ti,micbias1-gpo: ['ti,micbias1-vg']
129 ti,micbias2-gpo: ['ti,micbias2-vg']
132 - compatible
133 - reg
134 - clocks
139 - |
141 #include <dt-bindings/gpio/gpio.h>
142 #include <dt-bindings/sound/tlv320adc3xxx.h>
145 #address-cells = <1>;
146 #size-cells = <0>;
147 tlv320adc3101: audio-codec@18 {
150 reset-gpios = <&gpio_pc 3 GPIO_ACTIVE_LOW>;
152 gpio-controller;
153 #gpio-cells = <2>;
154 ti,dmdin-gpio1 = <ADC3XXX_GPIO_GPO>;
155 ti,micbias1-vg = <ADC3XXX_MICBIAS_AVDD>;
160 compatible = "fixed-clock";
161 #clock-cells = <0>;
162 clock-frequency = <24576000>;