Lines Matching +full:sub +full:- +full:block

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/st,stm32-sai.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Olivier Moysan <olivier.moysan@foss.st.com>
14 protocols as I2S standards, LSB or MSB-justified, PCM/DSP, TDM, and AC'97.
15 The SAI contains two independent audio sub-blocks. Each sub-block has
21 - st,stm32f4-sai
22 - st,stm32h7-sai
26 - description: Base address and size of SAI common register set.
27 - description: Base address and size of SAI identification register set.
39 "#address-cells":
42 "#size-cells":
48 clock-names:
51 access-controllers:
56 - compatible
57 - reg
58 - ranges
59 - "#address-cells"
60 - "#size-cells"
61 - clocks
62 - clock-names
65 "^audio-controller@[0-9a-f]+$":
69 Two subnodes corresponding to SAI sub-block instances A et B
70 can be defined. Subnode can be omitted for unused sub-block.
74 description: Compatible for SAI sub-block A or B.
75 pattern: "^st,stm32-sai-sub-[ab]$"
77 "#sound-dai-cells":
85 - description: sai_ck clock feeding the internal clock generator.
86 - description: MCLK clock from a SAI set as master clock provider.
89 clock-names:
91 - const: sai_ck
92 - const: MCLK
98 dma-names:
100 rx: SAI sub-block is configured as a capture DAI.
101 tx: SAI sub-block is configured as a playback DAI.
106 Configure the SAI sub-block as slave of another SAI sub-block.
107 By default SAI sub-block is in asynchronous mode.
108 Must contain the phandle and index of the SAI sub-block providing
110 $ref: /schemas/types.yaml#/definitions/phandle-array
112 - items:
113 - description: phandle of the SAI sub-block
114 - description: index of the SAI sub-block
125 "#clock-cells":
130 $ref: audio-graph-port.yaml#
134 - compatible
135 - "#sound-dai-cells"
136 - reg
137 - clocks
138 - clock-names
139 - dmas
140 - dma-names
143 - if:
147 const: st,stm32f4-sai
152 - description: x8k, SAI parent clock for sampling rates multiple of 8kHz.
153 - description: x11k, SAI parent clock for sampling rates multiple of 11.025kHz.
155 clock-names:
157 - const: x8k
158 - const: x11k
163 - description: pclk feeds the peripheral bus interface.
164 - description: x8k, SAI parent clock for sampling rates multiple of 8kHz.
165 - description: x11k, SAI parent clock for sampling rates multiple of 11.025kHz.
167 clock-names:
169 - const: pclk
170 - const: x8k
171 - const: x11k
176 - |
177 #include <dt-bindings/interrupt-controller/arm-gic.h>
178 #include <dt-bindings/clock/stm32mp1-clks.h>
179 #include <dt-bindings/reset/stm32mp1-resets.h>
181 compatible = "st,stm32h7-sai";
182 #address-cells = <1>;
183 #size-cells = <1>;
187 clock-names = "pclk", "x8k", "x11k";
188 pinctrl-names = "default", "sleep";
189 pinctrl-0 = <&sai2a_pins_a>, <&sai2b_pins_b>;
190 pinctrl-1 = <&sai2a_sleep_pins_a>, <&sai2b_sleep_pins_b>;
192 sai2a: audio-controller@4400b004 {
193 #sound-dai-cells = <0>;
194 compatible = "st,stm32-sai-sub-a";
197 dma-names = "tx";
199 clock-names = "sai_ck";