Lines Matching +full:mt8195 +full:- +full:scp_adsp
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/mt8195-afe-pcm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Mediatek AFE PCM controller for mt8195
10 - Trevor Wu <trevor.wu@mediatek.com>
14 const: mediatek,mt8195-audio
25 reset-names:
28 memory-region:
31 Shared memory region for AFE memif. A "shared-dma-pool".
32 See ../reserved-memory/reserved-memory.txt for details.
38 power-domains:
43 - description: 26M clock
44 - description: audio pll1 clock
45 - description: audio pll2 clock
46 - description: clock divider for i2si1_mck
47 - description: clock divider for i2si2_mck
48 - description: clock divider for i2so1_mck
49 - description: clock divider for i2so2_mck
50 - description: clock divider for dptx_mck
51 - description: a1sys hoping clock
52 - description: audio intbus clock
53 - description: audio hires clock
54 - description: audio local bus clock
55 - description: mux for dptx_mck
56 - description: mux for i2so1_mck
57 - description: mux for i2so2_mck
58 - description: mux for i2si1_mck
59 - description: mux for i2si2_mck
60 - description: audio infra 26M clock
61 - description: infra bus clock
63 clock-names:
65 - const: clk26m
66 - const: apll1_ck
67 - const: apll2_ck
68 - const: apll12_div0
69 - const: apll12_div1
70 - const: apll12_div2
71 - const: apll12_div3
72 - const: apll12_div9
73 - const: a1sys_hp_sel
74 - const: aud_intbus_sel
75 - const: audio_h_sel
76 - const: audio_local_bus_sel
77 - const: dptx_m_sel
78 - const: i2so1_m_sel
79 - const: i2so2_m_sel
80 - const: i2si1_m_sel
81 - const: i2si2_m_sel
82 - const: infra_ao_audio_26m_b
83 - const: scp_adsp_audiodsp
85 mediatek,etdm-in1-chn-disabled:
86 $ref: /schemas/types.yaml#/definitions/uint8-array
90 mediatek,etdm-in2-chn-disabled:
91 $ref: /schemas/types.yaml#/definitions/uint8-array
96 "^mediatek,etdm-in[1-2]-mclk-always-on-rate-hz$":
99 "^mediatek,etdm-out[1-3]-mclk-always-on-rate-hz$":
102 "^mediatek,etdm-in[1-2]-multi-pin-mode$":
106 "^mediatek,etdm-out[1-3]-multi-pin-mode$":
110 "^mediatek,etdm-in[1-2]-cowork-source$":
116 - 0 # etdm1_in
117 - 1 # etdm2_in
118 - 2 # etdm1_out
119 - 3 # etdm2_out
121 "^mediatek,etdm-out[1-2]-cowork-source$":
127 - 0 # etdm1_in
128 - 1 # etdm2_in
129 - 2 # etdm1_out
130 - 3 # etdm2_out
133 - compatible
134 - reg
135 - interrupts
136 - resets
137 - reset-names
138 - mediatek,topckgen
139 - power-domains
140 - clocks
141 - clock-names
142 - memory-region
147 - |
148 #include <dt-bindings/interrupt-controller/arm-gic.h>
149 #include <dt-bindings/interrupt-controller/irq.h>
151 afe: mt8195-afe-pcm@10890000 {
152 compatible = "mediatek,mt8195-audio";
156 reset-names = "audiosys";
158 power-domains = <&spm 7>; //MT8195_POWER_DOMAIN_AUDIO
159 memory-region = <&snd_dma_mem_reserved>;
178 <&scp_adsp 0>; //CLK_SCP_ADSP_AUDIODSP
179 clock-names = "clk26m",