Lines Matching +full:lsb +full:- +full:first

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shengjiu Wang <shengjiu.wang@nxp.com>
21 - items:
22 - enum:
23 - fsl,imx6ul-sai
24 - fsl,imx7d-sai
25 - const: fsl,imx6sx-sai
27 - items:
28 - enum:
29 - fsl,imx8mm-sai
30 - fsl,imx8mn-sai
31 - fsl,imx8mp-sai
32 - const: fsl,imx8mq-sai
34 - items:
35 - enum:
36 - fsl,imx6sx-sai
37 - fsl,imx7ulp-sai
38 - fsl,imx8mq-sai
39 - fsl,imx8qm-sai
40 - fsl,imx8ulp-sai
41 - fsl,imx93-sai
42 - fsl,imx95-sai
43 - fsl,vf610-sai
44 - items:
45 - enum:
46 - fsl,imx94-sai
47 - const: fsl,imx95-sai
54 - description: The ipg clock for register access
55 - description: master clock source 0 (obsoleted)
56 - description: master clock source 1
57 - description: master clock source 2
58 - description: master clock source 3
59 - description: PLL clock source for 8kHz series
60 - description: PLL clock source for 11kHz series
63 clock-names:
65 - items:
66 - const: bus
67 - const: mclk0
68 - const: mclk1
69 - const: mclk2
70 - const: mclk3
71 - const: pll8k
72 - const: pll11k
74 - items:
75 - const: bus
76 - const: mclk1
77 - const: mclk2
78 - const: mclk3
79 - const: pll8k
80 - const: pll11k
83 power-domains:
90 dma-names:
93 - enum: [ rx, tx ]
94 - const: tx
98 - description: receive and transmit interrupt
104 $ref: audio-graph-port.yaml#
109 $ref: audio-graph-port.yaml#
114 $ref: audio-graph-port.yaml#
118 big-endian:
120 required if all the SAI registers are big-endian rather than little-endian.
124 $ref: /schemas/types.yaml#/definitions/uint32-matrix
130 - description: format Default(0), I2S(1) or PDM(2)
132 - description: dataline mask for 'rx'
133 - description: dataline mask for 'tx'
135 fsl,sai-mclk-direction-output:
139 fsl,sai-synchronous-rx:
146 fsl,sai-asynchronous:
151 If both fsl,sai-asynchronous and fsl,sai-synchronous-rx are absent, the
157 fsl,shared-interrupt:
161 lsb-first:
163 Configures whether the LSB or the MSB is transmitted
164 first for the fifo data. If this property is absent,
165 the MSB is transmitted first as default, or the LSB
166 is transmitted first.
169 "#sound-dai-cells":
174 - $ref: dai-common.yaml#
175 - if:
177 - fsl,sai-asynchronous
180 fsl,sai-synchronous-rx: false
183 - compatible
184 - reg
185 - clocks
186 - clock-names
187 - dmas
188 - dma-names
189 - interrupts
194 - |
195 #include <dt-bindings/interrupt-controller/arm-gic.h>
196 #include <dt-bindings/clock/vf610-clock.h>
198 compatible = "fsl,vf610-sai";
201 pinctrl-names = "default";
202 pinctrl-0 = <&pinctrl_sai2_1>;
206 clock-names = "bus", "mclk1", "mclk2", "mclk3";
207 dma-names = "rx", "tx";
209 big-endian;
210 lsb-first;
213 - |
214 #include <dt-bindings/interrupt-controller/arm-gic.h>
215 #include <dt-bindings/clock/imx8mm-clock.h>
217 compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
224 clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
226 dma-names = "rx", "tx";
228 #sound-dai-cells = <0>;
231 #address-cells = <1>;
232 #size-cells = <0>;
236 playback-only;
239 dai-tdm-slot-num = <8>;
240 dai-tdm-slot-width = <32>;
241 dai-tdm-slot-width-map = <32 8 32>;
242 dai-format = "dsp_a";
243 bitclock-master;
244 frame-master;
245 remote-endpoint = <&mcodec01_ep>;
251 capture-only;
254 dai-tdm-slot-num = <8>;
255 dai-tdm-slot-width = <32>;
256 dai-tdm-slot-width-map = <32 8 32>;
257 dai-format = "dsp_a";
258 remote-endpoint = <&fe02_ep>;