Lines Matching +full:codec +full:- +full:irq

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Everest ES8326 audio CODEC
10   - David Yang <yangxiaohua@everest-semi.com>
21       - description: clock for master clock (MCLK)
23   clock-names:
25       - const: mclk
31   "#sound-dai-cells":
34   everest,jack-pol:
44   everest,mic1-src:
53   everest,mic2-src:
62   everest,jack-detect-inverted:
67   everest,interrupt-src:
71       Bit(2) 1 means button press triggers irq, 0 means not.
72       Bit(3) 1 means PIN9 is the irq source for jack detection. When set to 0,
73       bias change on PIN9 do not triggers irq.
74       Bit(4) 1 means PIN27 is the irq source for jack detection.
75       Bit(5) 1 means PIN9 is the irq source after MIC detect.
76       Bit(6) 1 means PIN27 is the irq source after MIC detect.
81   everest,interrupt-clk:
85      Bit(0-3) 0 means irq pulse equals 512*internal clock
86        1 means irq pulse equals 1024*internal clock
88        7 means irq pulse equals 65536*internal clock
89        8 means irq mutes PA
90        9 means irq mutes PA and DAC output
99   - compatible
100   - reg
101   - "#sound-dai-cells"
106   - |
108       #address-cells = <1>;
109       #size-cells = <0>;
110       es8326: codec@19 {
114         clock-names = "mclk";
115         #sound-dai-cells = <0>;
116         everest,jack-pol = [0e];
117         everest,interrupt-src = [08];
118         everest,interrupt-clk = [00];