Lines Matching +full:assigned +full:- +full:clocks +full:- +full:parents
4 - compatible : "brcm,cygnus-audio"
5 - #address-cells: 32bit valued, 1 cell.
6 - #size-cells: 32bit valued, 0 cell.
7 - reg : Should contain audio registers location and length
8 - reg-names: names of the registers listed in "reg" property
12 - clocks: PLL and leaf clocks used by audio ports
13 - assigned-clocks: PLL and leaf clocks
14 - assigned-clock-parents: parent clocks of the assigned clocks
16 - assigned-clock-rates: List of clock frequencies of the
17 assigned clocks
18 - clock-names: names of 3 leaf clocks used by audio ports
20 - interrupts: audio DMA interrupt number
23 - reg: The index of ssp port interface to use
28 compatible = "brcm,cygnus-audio";
29 #address-cells = <1>;
30 #size-cells = <0>;
32 reg-names = "aud", "i2s_in";
33 clocks = <&audiopll BCM_CYGNUS_AUDIOPLL_CH0>,
36 assigned-clocks = <&audiopll BCM_CYGNUS_AUDIOPLL>,
40 assigned-clock-parents = <&audiopll BCM_CYGNUS_AUDIOPLL>;
41 assigned-clock-rates = <1769470191>,
45 clock-names = "ch0_audio", "ch1_audio", "ch2_audio";