Lines Matching +full:imx8mp +full:- +full:ldb
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mp-media-blk-ctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Paul Elder <paul.elder@ideasonboard.com>
13 The i.MX8MP Media Block Control (MEDIA BLK_CTRL) is a top-level peripheral
20 - const: fsl,imx8mp-media-blk-ctrl
21 - const: syscon
26 '#address-cells':
29 '#size-cells':
32 '#power-domain-cells':
35 power-domains:
38 power-domain-names:
40 - const: bus
41 - const: mipi-dsi1
42 - const: mipi-csi1
43 - const: lcdif1
44 - const: isi
45 - const: mipi-csi2
46 - const: lcdif2
47 - const: isp
48 - const: dwe
49 - const: mipi-dsi2
53 - description: The APB clock
54 - description: The AXI clock
55 - description: The pixel clock for the first CSI2 receiver (aclk)
56 - description: The pixel clock for the second CSI2 receiver (aclk)
57 - description: The pixel clock for the first LCDIF (pix_clk)
58 - description: The pixel clock for the second LCDIF (pix_clk)
59 - description: The core clock for the ISP (clk)
60 - description: The MIPI-PHY reference clock used by DSI
62 clock-names:
64 - const: apb
65 - const: axi
66 - const: cam1
67 - const: cam2
68 - const: disp1
69 - const: disp2
70 - const: isp
71 - const: phy
76 interconnect-names:
78 - const: lcdif-rd
79 - const: lcdif-wr
80 - const: isi0
81 - const: isi1
82 - const: isi2
83 - const: isp0
84 - const: isp1
85 - const: dwe
89 $ref: /schemas/display/bridge/fsl,ldb.yaml#
93 - compatible
94 - reg
95 - '#address-cells'
96 - '#size-cells'
97 - '#power-domain-cells'
98 - power-domains
99 - power-domain-names
100 - clocks
101 - clock-names
106 - |
107 #include <dt-bindings/clock/imx8mp-clock.h>
108 #include <dt-bindings/power/imx8mp-power.h>
110 blk-ctrl@32ec0000 {
111 compatible = "fsl,imx8mp-media-blk-ctrl", "syscon";
113 power-domains = <&mediamix_pd>, <&mipi_phy1_pd>, <&mipi_phy1_pd>,
117 power-domain-names = "bus", "mipi-dsi1", "mipi-csi1", "lcdif1", "isi",
118 "mipi-csi2", "lcdif2", "isp", "dwe", "mipi-dsi2";
127 clock-names = "apb", "axi", "cam1", "cam2", "disp1", "disp2",
129 #power-domain-cells = <1>;
130 #address-cells = <1>;
131 #size-cells = <1>;
134 compatible = "fsl,imx8mp-ldb";
136 reg-names = "ldb", "lvds";
138 clock-names = "ldb";
141 #address-cells = <1>;
142 #size-cells = <0>;
148 remote-endpoint = <&lcdif2_to_ldb>;
156 remote-endpoint = <&ldb_to_lvdsx4panel>;