Lines Matching +full:pcie +full:- +full:phy2
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mp-hsio-blk-ctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8MP HSIO blk-ctrl
10 - Lucas Stach <l.stach@pengutronix.de>
13 The i.MX8MP HSIO blk-ctrl is a top-level peripheral providing access to
14 the NoC and ensuring proper power sequencing of the high-speed IO
15 (USB an PCIe) peripherals located in the HSIO domain of the SoC.
20 - const: fsl,imx8mp-hsio-blk-ctrl
21 - const: syscon
26 '#power-domain-cells':
29 power-domains:
33 power-domain-names:
35 - const: bus
36 - const: usb
37 - const: usb-phy1
38 - const: usb-phy2
39 - const: pcie
40 - const: pcie-phy
42 '#clock-cells':
49 clock-names:
51 - const: usb
52 - const: pcie
57 interconnect-names:
59 - const: noc-pcie
60 - const: usb1
61 - const: usb2
62 - const: pcie
65 - compatible
66 - reg
67 - power-domains
68 - power-domain-names
69 - clocks
70 - clock-names
75 - |
76 #include <dt-bindings/clock/imx8mp-clock.h>
77 #include <dt-bindings/power/imx8mp-power.h>
79 blk-ctrl@32f10000 {
80 compatible = "fsl,imx8mp-hsio-blk-ctrl", "syscon";
84 clock-names = "usb", "pcie";
85 power-domains = <&pgc_hsiomix>, <&pgc_hsiomix>,
88 power-domain-names = "bus", "usb", "usb-phy1",
89 "usb-phy2", "pcie", "pcie-phy";
90 #power-domain-cells = <1>;
91 #clock-cells = <0>;