Lines Matching +full:generic +full:- +full:names
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Geert Uytterhoeven <geert+renesas@glider.be>
13 - $ref: serial.yaml#
18 - items:
19 - enum:
20 - renesas,hscif-r8a7778 # R-Car M1
21 - renesas,hscif-r8a7779 # R-Car H1
22 - const: renesas,rcar-gen1-hscif # R-Car Gen1
23 - const: renesas,hscif # generic HSCIF compatible UART
25 - items:
26 - enum:
27 - renesas,hscif-r8a7742 # RZ/G1H
28 - renesas,hscif-r8a7743 # RZ/G1M
29 - renesas,hscif-r8a7744 # RZ/G1N
30 - renesas,hscif-r8a7745 # RZ/G1E
31 - renesas,hscif-r8a77470 # RZ/G1C
32 - renesas,hscif-r8a7790 # R-Car H2
33 - renesas,hscif-r8a7791 # R-Car M2-W
34 - renesas,hscif-r8a7792 # R-Car V2H
35 - renesas,hscif-r8a7793 # R-Car M2-N
36 - renesas,hscif-r8a7794 # R-Car E2
37 - const: renesas,rcar-gen2-hscif # R-Car Gen2 and RZ/G1
38 - const: renesas,hscif # generic HSCIF compatible UART
40 - items:
41 - enum:
42 - renesas,hscif-r8a774a1 # RZ/G2M
43 - renesas,hscif-r8a774b1 # RZ/G2N
44 - renesas,hscif-r8a774c0 # RZ/G2E
45 - renesas,hscif-r8a774e1 # RZ/G2H
46 - renesas,hscif-r8a7795 # R-Car H3
47 - renesas,hscif-r8a7796 # R-Car M3-W
48 - renesas,hscif-r8a77961 # R-Car M3-W+
49 - renesas,hscif-r8a77965 # R-Car M3-N
50 - renesas,hscif-r8a77970 # R-Car V3M
51 - renesas,hscif-r8a77980 # R-Car V3H
52 - renesas,hscif-r8a77990 # R-Car E3
53 - renesas,hscif-r8a77995 # R-Car D3
54 - const: renesas,rcar-gen3-hscif # R-Car Gen3 and RZ/G2
55 - const: renesas,hscif # generic HSCIF compatible UART
57 - items:
58 - enum:
59 - renesas,hscif-r8a779a0 # R-Car V3U
60 - renesas,hscif-r8a779f0 # R-Car S4-8
61 - renesas,hscif-r8a779g0 # R-Car V4H
62 - renesas,hscif-r8a779h0 # R-Car V4M
63 - const: renesas,rcar-gen4-hscif # R-Car Gen4
64 - const: renesas,hscif # generic HSCIF compatible UART
76 clock-names:
81 - fck # UART functional clock
82 - hsck # optional external clock input
83 - brg_int # optional internal clock source for BRG frequency divider
84 - scif_clk # optional external clock source for BRG frequency divider
86 power-domains:
99 dma-names:
104 - tx
105 - rx
108 - compatible
109 - reg
110 - interrupts
111 - clocks
112 - clock-names
113 - power-domains
120 - renesas,rcar-gen2-hscif
121 - renesas,rcar-gen3-hscif
122 - renesas,rcar-gen4-hscif
125 - resets
130 - |
131 #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
132 #include <dt-bindings/interrupt-controller/arm-gic.h>
133 #include <dt-bindings/power/r8a7795-sysc.h>
139 compatible = "renesas,hscif-r8a7795", "renesas,rcar-gen3-hscif",
145 clock-names = "fck", "brg_int", "scif_clk";
147 dma-names = "tx", "rx", "tx", "rx";
148 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
150 uart-has-rtscts;