Lines Matching +full:r8a7795 +full:- +full:wdt
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car and RZ/G Reset Controller
10 - Geert Uytterhoeven <geert+renesas@glider.be>
11 - Magnus Damm <magnus.damm@gmail.com>
14 The R-Car and RZ/G Reset Controllers provide reset control, and implement the
16 - Latching of the levels on mode pins when PRESET# is negated,
17 - Mode monitoring register,
18 - Reset control of peripheral devices (on R-Car Gen1),
19 - Watchdog timer (on R-Car Gen1),
20 - Register-based reset control and boot address registers for the various
21 CPU cores (on R-Car Gen2 and Gen3, and on RZ/G).
26 - renesas,r8a7742-rst # RZ/G1H
27 - renesas,r8a7743-rst # RZ/G1M
28 - renesas,r8a7744-rst # RZ/G1N
29 - renesas,r8a7745-rst # RZ/G1E
30 - renesas,r8a77470-rst # RZ/G1C
31 - renesas,r8a774a1-rst # RZ/G2M
32 - renesas,r8a774a3-rst # RZ/G2M v3.0
33 - renesas,r8a774b1-rst # RZ/G2N
34 - renesas,r8a774c0-rst # RZ/G2E
35 - renesas,r8a774e1-rst # RZ/G2H
36 - renesas,r8a7778-reset-wdt # R-Car M1A
37 - renesas,r8a7779-reset-wdt # R-Car H1
38 - renesas,r8a7790-rst # R-Car H2
39 - renesas,r8a7791-rst # R-Car M2-W
40 - renesas,r8a7792-rst # R-Car V2H
41 - renesas,r8a7793-rst # R-Car M2-N
42 - renesas,r8a7794-rst # R-Car E2
43 - renesas,r8a7795-rst # R-Car H3
44 - renesas,r8a7796-rst # R-Car M3-W
45 - renesas,r8a77961-rst # R-Car M3-W+
46 - renesas,r8a77965-rst # R-Car M3-N
47 - renesas,r8a77970-rst # R-Car V3M
48 - renesas,r8a77980-rst # R-Car V3H
49 - renesas,r8a77990-rst # R-Car E3
50 - renesas,r8a77995-rst # R-Car D3
51 - renesas,r8a779a0-rst # R-Car V3U
52 - renesas,r8a779f0-rst # R-Car S4-8
53 - renesas,r8a779g0-rst # R-Car V4H
54 - renesas,r8a779h0-rst # R-Car V4M
60 - compatible
61 - reg
66 - |
67 rst: reset-controller@e6160000 {
68 compatible = "renesas,r8a7795-rst";