Lines Matching +full:sun6i +full:- +full:a31 +full:- +full:ahb1 +full:- +full:reset
1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/reset/allwinner,sun6i-a31-clock-reset.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A31 Peripheral Reset Controller
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
20 - allwinner,sun6i-a31-ahb1-reset
21 - allwinner,sun6i-a31-clock-reset
23 # The PRCM on the A31 and A23 will have the reg property missing,
27 - compatible
28 - reg
31 "#reset-cells":
34 This additional argument passed to that reset controller is the
35 offset of the bit controlling this particular reset line in the
40 - allwinner,sun6i-a31-ahb1-reset
41 - allwinner,sun6i-a31-clock-reset
47 - "#reset-cells"
48 - compatible
49 - reg
54 - |
55 ahb1_rst: reset@1c202c0 {
56 #reset-cells = <1>;
57 compatible = "allwinner,sun6i-a31-ahb1-reset";
61 - |
62 apbs_rst: reset@80014b0 {
63 #reset-cells = <1>;
64 compatible = "allwinner,sun6i-a31-clock-reset";