Lines Matching +full:sub +full:- +full:bus
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/ti,k3-r5f-rproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Suman Anna <s-anna@ti.com>
13 The TI K3 family of SoCs usually have one or more dual-core Arm Cortex R5F
20 AM64x SoCs do not support LockStep mode, but rather a new non-safety mode
21 called "Single-CPU" mode, where only Core0 is used, but with ability to use
27 Each Dual-Core R5F sub-system is represented as a single DTS node
40 - ti,am62-r5fss
41 - ti,am64-r5fss
42 - ti,am654-r5fss
43 - ti,j7200-r5fss
44 - ti,j721e-r5fss
45 - ti,j721s2-r5fss
47 power-domains:
53 "#address-cells":
56 "#size-cells":
62 local R5F TCM address spaces to bus addresses.
65 # --------------------
67 ti,cluster-mode:
76 It should be either a value of 0 (Split mode) or 2 (Single-CPU mode) and
79 It should be set as 3 (Single-Core mode) which is also the default if
87 "^r5f@[a-f0-9]+$":
90 The R5F Sub-System device node should define two R5F child nodes, each
93 a Region Address Translator (RAT) for translating the larger SoC bus
94 addresses into a 32-bit address space for the processor. For AM62x,
95 the R5F Sub-System device node should only define one R5F child node
98 Each R5F core has an associated 64 KB of Tightly-Coupled Memory (TCM)
99 internal memories split between two banks - TCMA and TCMB (further
107 translations between 32-bit CPU addresses into larger system bus
111 $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#
116 - ti,am62-r5f
117 - ti,am64-r5f
118 - ti,am654-r5f
119 - ti,j7200-r5f
120 - ti,j721e-r5f
121 - ti,j721s2-r5f
125 - description: Address and Size of the ATCM internal memory region
126 - description: Address and Size of the BTCM internal memory region
128 reg-names:
130 - const: atcm
131 - const: btcm
139 firmware-name:
150 OMAP Mailbox specifier denoting the sub-mailbox, to be used for
152 with the sub-mailbox node used in the firmware image.
155 memory-region:
160 should be defined with a "no-map" property as per the bindings in
161 Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt
165 - description: region used for dynamic DMA allocations like vrings and
167 - description: region reserved for firmware image sections
172 # --------------------
175 ti,atcm-enable:
184 ti,btcm-enable:
202 $ref: /schemas/types.yaml#/definitions/phandle-array
208 phandles to one or more reserved on-chip SRAM regions. The regions
214 - compatible
215 - reg
216 - reg-names
217 - ti,sci
218 - ti,sci-dev-id
219 - ti,sci-proc-ids
220 - resets
221 - firmware-name
226 - if:
230 - ti,am64-r5fss
233 ti,cluster-mode:
236 - if:
240 - ti,am654-r5fss
241 - ti,j7200-r5fss
242 - ti,j721e-r5fss
243 - ti,j721s2-r5fss
246 ti,cluster-mode:
249 - if:
253 - ti,am62-r5fss
256 ti,cluster-mode:
260 - compatible
261 - power-domains
262 - "#address-cells"
263 - "#size-cells"
264 - ranges
269 - |
271 #address-cells = <2>;
272 #size-cells = <2>;
274 mailbox0: mailbox-0 {
275 #mbox-cells = <1>;
278 mailbox1: mailbox-1 {
279 #mbox-cells = <1>;
282 bus@100000 {
283 compatible = "simple-bus";
284 #address-cells = <2>;
285 #size-cells = <2>;
291 bus@28380000 {
292 compatible = "simple-bus";
293 #address-cells = <2>;
294 #size-cells = <2>;
302 compatible = "ti,am654-r5fss";
303 power-domains = <&k3_pds 129>;
304 ti,cluster-mode = <1>;
305 #address-cells = <1>;
306 #size-cells = <1>;
311 compatible = "ti,am654-r5f";
314 reg-names = "atcm", "btcm";
316 ti,sci-dev-id = <159>;
317 ti,sci-proc-ids = <0x01 0xFF>;
319 firmware-name = "am65x-mcu-r5f0_0-fw";
320 ti,atcm-enable = <1>;
321 ti,btcm-enable = <1>;
324 memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
330 compatible = "ti,am654-r5f";
333 reg-names = "atcm", "btcm";
335 ti,sci-dev-id = <245>;
336 ti,sci-proc-ids = <0x02 0xFF>;
338 firmware-name = "am65x-mcu-r5f0_1-fw";
339 ti,atcm-enable = <1>;
340 ti,btcm-enable = <1>;