Lines Matching +full:core +full:- +full:domain
1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,sc8280xp-pas.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
19 - qcom,sc8280xp-adsp-pas
20 - qcom,sc8280xp-nsp0-pas
21 - qcom,sc8280xp-nsp1-pas
28 - description: XO clock
30 clock-names:
32 - const: xo
36 description: Reference to the AOSS side-channel message RAM.
38 smd-edge: false
40 memory-region:
42 description: Reference to the reserved-memory for the Hexagon core
44 firmware-name:
46 description: Firmware name for the Hexagon core
49 - compatible
50 - reg
51 - memory-region
54 - $ref: /schemas/remoteproc/qcom,pas-common.yaml#
55 - if:
59 - qcom,sc8280xp-nsp0-pas
60 - qcom,sc8280xp-nsp1-pas
65 interrupt-names:
71 interrupt-names:
74 - if:
78 - qcom,sc8280xp-adsp-pas
81 power-domains:
83 - description: LCX power domain
84 - description: LMX power domain
85 power-domain-names:
87 - const: lcx
88 - const: lmx
91 power-domains:
93 - description: NSP power domain
94 power-domain-names:
96 - const: nsp
101 - |
102 #include <dt-bindings/clock/qcom,rpmh.h>
103 #include <dt-bindings/interrupt-controller/arm-gic.h>
104 #include <dt-bindings/interrupt-controller/irq.h>
105 #include <dt-bindings/mailbox/qcom-ipcc.h>
106 #include <dt-bindings/power/qcom-rpmpd.h>
109 compatible = "qcom,sc8280xp-adsp-pas";
113 clock-names = "xo";
115 firmware-name = "qcom/sc8280xp/qcadsp8280.mbn";
117 interrupts-extended = <&intc GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
123 interrupt-names = "wdog", "fatal", "ready",
124 "handover", "stop-ack", "shutdown-ack";
126 memory-region = <&pil_adsp_mem>;
128 power-domains = <&rpmhpd SC8280XP_LCX>,
130 power-domain-names = "lcx", "lmx";
133 qcom,smem-states = <&smp2p_adsp_out 0>;
134 qcom,smem-state-names = "stop";
136 glink-edge {
137 interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
144 qcom,remote-pid = <2>;