Lines Matching +full:gcc +full:- +full:sdm845
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,sc7280-adsp-pil.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
19 - qcom,sc7280-adsp-pil
23 - description: qdsp6ss register
24 - description: efuse q6ss register
28 - description: Phandle to apps_smmu node with sid mask
32 - description: Watchdog interrupt
33 - description: Fatal interrupt
34 - description: Ready interrupt
35 - description: Handover interrupt
36 - description: Stop acknowledge interrupt
37 - description: Shutdown acknowledge interrupt
39 interrupt-names:
41 - const: wdog
42 - const: fatal
43 - const: ready
44 - const: handover
45 - const: stop-ack
46 - const: shutdown-ack
50 - description: XO clock
51 - description: GCC CFG NOC LPASS clock
53 clock-names:
55 - const: xo
56 - const: gcc_cfg_noc_lpass
58 power-domains:
60 - description: LCX power domain
64 - description: PDC AUDIO SYNC RESET
65 - description: CC LPASS restart
67 reset-names:
69 - const: pdc_sync
70 - const: cc_lpass
72 memory-region:
74 description: Reference to the reserved-memory for the Hexagon core
76 qcom,halt-regs:
77 $ref: /schemas/types.yaml#/definitions/phandle-array
82 - items:
83 - description: phandle to TCSR_MUTEX registers
84 - description: offset to the Q6 halt register
85 - description: offset to the modem halt register
86 - description: offset to the nc halt register
87 - description: offset to the vq6 halt register
89 qcom,smem-states:
90 $ref: /schemas/types.yaml#/definitions/phandle-array
93 - description: Stop the modem
95 qcom,smem-state-names:
101 description: Reference to the AOSS side-channel message RAM.
103 glink-edge:
104 $ref: qcom,glink-edge.yaml#
108 Qualcomm G-Link subnode which represents communication edge, channels
120 - label
123 - compatible
124 - reg
125 - interrupts
126 - interrupt-names
127 - clocks
128 - clock-names
129 - power-domains
130 - resets
131 - reset-names
132 - qcom,halt-regs
133 - memory-region
134 - qcom,smem-states
135 - qcom,smem-state-names
136 - qcom,qmp
141 - |
142 #include <dt-bindings/interrupt-controller/arm-gic.h>
143 #include <dt-bindings/clock/qcom,rpmh.h>
144 #include <dt-bindings/clock/qcom,gcc-sc7280.h>
145 #include <dt-bindings/clock/qcom,lpass-sc7280.h>
146 #include <dt-bindings/reset/qcom,sdm845-aoss.h>
147 #include <dt-bindings/reset/qcom,sdm845-pdc.h>
148 #include <dt-bindings/power/qcom-rpmpd.h>
149 #include <dt-bindings/mailbox/qcom-ipcc.h>
152 compatible = "qcom,sc7280-adsp-pil";
156 interrupts-extended = <&pdc 162 IRQ_TYPE_EDGE_RISING>,
163 interrupt-names = "wdog", "fatal", "ready",
164 "handover", "stop-ack", "shutdown-ack";
167 <&gcc GCC_CFG_NOC_LPASS_CLK>;
168 clock-names = "xo", "gcc_cfg_noc_lpass";
170 power-domains = <&rpmhpd SC7280_LCX>;
174 reset-names = "pdc_sync", "cc_lpass";
176 qcom,halt-regs = <&tcsr_mutex 0x23000 0x25000 0x28000 0x33000>;
178 memory-region = <&adsp_mem>;
180 qcom,smem-states = <&adsp_smp2p_out 0>;
181 qcom,smem-state-names = "stop";
185 glink-edge {
186 interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
193 qcom,remote-pid = <2>;