Lines Matching +full:vf610 +full:- +full:ftm +full:- +full:pwm
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pwm/fsl,vf610-ftm-pwm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale FlexTimer Module (FTM) PWM controller
10 The same FTM PWM device can have a different endianness on different SoCs. The
13 for the endianness of the FTM PWM block as integrated into the existing SoCs:
15 SoC | FTM-PWM endianness
16 --------+-------------------
25 - Frank Li <Frank.Li@nxp.com>
30 - fsl,vf610-ftm-pwm
31 - fsl,imx8qm-ftm-pwm
36 "#pwm-cells":
43 clock-names:
45 - const: ftm_sys
46 - const: ftm_ext
47 - const: ftm_fix
48 - const: ftm_cnt_clk_en
50 pinctrl-0: true
51 pinctrl-1: true
53 pinctrl-names:
56 - const: default
57 - const: sleep
59 big-endian:
62 Boolean property, required if the FTM PWM registers use a big-
63 endian rather than little-endian layout.
66 - compatible
67 - reg
68 - clocks
69 - clock-names
72 - $ref: pwm.yaml#
77 - |
78 #include <dt-bindings/clock/vf610-clock.h>
80 pwm@40038000 {
81 compatible = "fsl,vf610-ftm-pwm";
83 #pwm-cells = <3>;
88 clock-names = "ftm_sys", "ftm_ext", "ftm_fix", "ftm_cnt_clk_en";
89 pinctrl-names = "default";
90 pinctrl-0 = <&pinctrl_pwm0_1>;
91 big-endian;