Lines Matching +full:tri +full:- +full:default

1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/xlnx,zynqmp-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Sai Krishna Potthuri <sai.krishna.potthuri@amd.com>
13   Please refer to pinctrl-bindings.txt in this directory for details of the
21   parameters, such as pull-up, slew rate, etc.
31     const: xlnx,zynqmp-pinctrl
34   '^(.*-)?(default|gpio-grp)$':
42         $ref: pinmux-node.yaml#
49               pattern: '^MIO([0-9]|[1-6][0-9]|7[0-7])$'
57                 - pattern: '^MIO([0-9]|[1-6][0-9]|7[0-7])$'
58                 - enum: [ethernet0_0_grp, ethernet1_0_grp, ethernet2_0_grp,
241           - function
244           - required: [ groups ]
245           - required: [ pins ]
254         $ref: pincfg-node.yaml#
265               pattern: '^MIO([0-9]|[1-6][0-9]|7[0-7])$'
268           bias-pull-up: true
270           bias-pull-down: true
272           bias-disable: true
274           input-schmitt-enable: true
276           input-schmitt-disable: true
278           bias-high-impedance: true
280           low-power-enable: true
282           low-power-disable: true
284           slew-rate:
287           output-enable:
289               This will internally disable the tri-state for MIO pins.
291           drive-strength:
296           power-source:
300           - required: [ groups ]
301           - required: [ pins ]
308   - $ref: pinctrl.yaml#
311   - compatible
316   - |
317     #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
318     zynqmp_firmware: zynqmp-firmware {
320           compatible = "xlnx,zynqmp-pinctrl";
322           pinctrl_uart1_default: uart1-default {
330                 slew-rate = <SLEW_RATE_SLOW>;
331                 power-source = <IO_STANDARD_LVCMOS18>;
334              conf-rx {
336                 bias-pull-up;
339              conf-tx {
341                 bias-disable;
342                 input-schmitt-disable;
349          pinctrl-names = "default";
350          pinctrl-0 = <&pinctrl_uart1_default>;