Lines Matching +full:rxclk +full:- +full:pins

1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/starfive,jh7100-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 Bindings for the JH7100 RISC-V SoC from StarFive Ltd.
12 Out of the SoC's many pins only the ones named PAD_GPIO[0] to PAD_GPIO[63]
15 interesting 2-layered approach to pin muxing best illustrated by the diagram
21 LCD output -----------------| |
22 CMOS Camera interface ------| |--- PAD_GPIO[0]
23 Ethernet PHY interface -----| MUX |--- PAD_GPIO[1]
25 | |--- PAD_GPIO[63]
26 -------- GPIO0 ------------| |
27 | -------|-- GPIO1 --------| |--- PAD_FUNC_SHARE[0]
28 | | | | | |--- PAD_FUNC_SHARE[1]
30 | | | | | |--- PAD_FUNC_SHARE[141]
31 | | -----|---|-- GPIO63 ---| |
32 | | | | | | -------
33 UART0 UART1 --
37 on the left to pins on the right. StarFive calls the 7 configurations "signal
44 Note that signal group 0 doesn't map any of the GPIOs to pins, and only
45 signal group 1 maps the GPIOs to the pins named PAD_GPIO[0] to PAD_GPIO[63].
48 - Emil Renner Berthing <kernel@esmil.dk>
49 - Drew Fustini <drew@beagleboard.org>
53 const: starfive,jh7100-pinctrl
59 reg-names:
61 - const: gpio
62 - const: padctl
70 gpio-controller: true
72 "#gpio-cells":
79 interrupt-controller: true
81 "#interrupt-cells":
84 starfive,signal-group:
92 - compatible
93 - reg
94 - reg-names
95 - clocks
96 - gpio-controller
97 - "#gpio-cells"
98 - interrupts
99 - interrupt-controller
100 - "#interrupt-cells"
103 '-[0-9]+$':
106 '-pins$':
111 pins it needs, and how they should be configured, with regard to
113 trigger enable/disable, slew-rate and drive strength.
114 $ref: /schemas/pinctrl/pincfg-node.yaml
117 pins:
123 $ref: /schemas/pinctrl/pinmux-node.yaml#/properties/pins
129 Either this or "pins" has to be specified, but not both.
130 $ref: /schemas/pinctrl/pinmux-node.yaml#/properties/pinmux
132 bias-disable: true
134 bias-pull-up:
137 bias-pull-down:
140 drive-strength:
143 input-enable: true
145 input-disable: true
147 input-schmitt-enable: true
149 input-schmitt-disable: true
151 slew-rate:
154 starfive,strong-pull-up:
155 description: enable strong pull-up.
165 - |
166 #include <dt-bindings/clock/starfive-jh7100.h>
167 #include <dt-bindings/reset/starfive-jh7100.h>
168 #include <dt-bindings/pinctrl/pinctrl-starfive-jh7100.h>
171 #address-cells = <2>;
172 #size-cells = <2>;
175 compatible = "starfive,jh7100-pinctrl";
178 reg-names = "gpio", "padctl";
182 gpio-controller;
183 #gpio-cells = <2>;
184 interrupt-controller;
185 #interrupt-cells = <2>;
186 starfive,signal-group = <6>;
188 gmac_pins_default: gmac-0 {
189 gtxclk-pins {
190 pins = <PAD_FUNC_SHARE(115)>;
191 bias-pull-up;
192 drive-strength = <35>;
193 input-enable;
194 input-schmitt-enable;
195 slew-rate = <0>;
197 miitxclk-pins {
198 pins = <PAD_FUNC_SHARE(116)>;
199 bias-pull-up;
200 drive-strength = <14>;
201 input-enable;
202 input-schmitt-disable;
203 slew-rate = <0>;
205 tx-pins {
206 pins = <PAD_FUNC_SHARE(117)>,
215 bias-disable;
216 drive-strength = <35>;
217 input-disable;
218 input-schmitt-disable;
219 slew-rate = <0>;
221 rxclk-pins {
222 pins = <PAD_FUNC_SHARE(127)>;
223 bias-pull-up;
224 drive-strength = <14>;
225 input-enable;
226 input-schmitt-disable;
227 slew-rate = <6>;
229 rxer-pins {
230 pins = <PAD_FUNC_SHARE(129)>;
231 bias-pull-up;
232 drive-strength = <14>;
233 input-enable;
234 input-schmitt-disable;
235 slew-rate = <0>;
237 rx-pins {
238 pins = <PAD_FUNC_SHARE(128)>,
251 bias-pull-up;
252 drive-strength = <14>;
253 input-enable;
254 input-schmitt-enable;
255 slew-rate = <0>;
259 i2c0_pins_default: i2c0-0 {
260 i2c-pins {
267 bias-disable; /* external pull-up */
268 input-enable;
269 input-schmitt-enable;
273 uart3_pins_default: uart3-0 {
274 rx-pins {
277 bias-pull-up;
278 input-enable;
279 input-schmitt-enable;
281 tx-pins {
284 bias-disable;
285 input-disable;
286 input-schmitt-disable;
292 pinctrl-0 = <&gmac_pins_default>;
293 pinctrl-names = "default";
297 pinctrl-0 = <&i2c0_pins_default>;
298 pinctrl-names = "default";
302 pinctrl-0 = <&uart3_pins_default>;
303 pinctrl-names = "default";