Lines Matching +full:bias +full:- +full:pull +full:- +full:pin +full:- +full:default

1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Heiko Stuebner <heiko@sntech.de>
18   Please refer to pinctrl-bindings.txt in this directory for details of the
20   phrase "pin configuration node".
22   The Rockchip pin configuration node is a node of a group of pins which can be
25   (also named pin mode) this pin can work on and the 'config' configures
26   various pad settings such as pull-up, etc.
28   The pins are grouped into up to 9 individual pin banks which need to be
29   defined as gpio sub-nodes of the pinmux controller.
34       - rockchip,px30-pinctrl
35       - rockchip,rk2928-pinctrl
36       - rockchip,rk3036-pinctrl
37       - rockchip,rk3066a-pinctrl
38       - rockchip,rk3066b-pinctrl
39       - rockchip,rk3128-pinctrl
40       - rockchip,rk3188-pinctrl
41       - rockchip,rk3228-pinctrl
42       - rockchip,rk3288-pinctrl
43       - rockchip,rk3308-pinctrl
44       - rockchip,rk3328-pinctrl
45       - rockchip,rk3368-pinctrl
46       - rockchip,rk3399-pinctrl
47       - rockchip,rk3568-pinctrl
48       - rockchip,rk3576-pinctrl
49       - rockchip,rk3588-pinctrl
50       - rockchip,rv1108-pinctrl
51       - rockchip,rv1126-pinctrl
66   "#address-cells":
69   "#size-cells":
75   - $ref: pinctrl.yaml#
78   - compatible
79   - rockchip,grf
82   "gpio@[0-9a-f]+$":
85     $ref: /schemas/gpio/rockchip,gpio-bank.yaml#
90   "pcfg-[a-z0-9-]+$":
93       bias-disable: true
95       bias-pull-down: true
97       bias-pull-pin-default: true
99       bias-pull-up: true
101       drive-strength:
105       input-enable: true
107       input-schmitt-enable: true
109       output-high: true
111       output-low: true
123         $ref: /schemas/types.yaml#/definitions/uint32-matrix
127             - minimum: 0
130                 Pin bank.
131             - minimum: 0
134                 Pin bank index.
135             - minimum: 0
140             - description:
142                 to use as described in pinctrl-bindings.txt.
145   - |
146     #include <dt-bindings/interrupt-controller/arm-gic.h>
147     #include <dt-bindings/pinctrl/rockchip.h>
150       compatible = "rockchip,rk3066a-pinctrl";
153       #address-cells = <1>;
154       #size-cells = <1>;
158         compatible = "rockchip,gpio-bank";
163         gpio-controller;
164         #gpio-cells = <2>;
166         interrupt-controller;
167         #interrupt-cells = <2>;
170       pcfg_pull_default: pcfg-pull-default {
171         bias-pull-pin-default;
175         uart2_xfer: uart2-xfer {
183       compatible = "snps,dw-apb-uart";
187       pinctrl-0 = <&uart2_xfer>;
188       pinctrl-names = "default";
189       reg-io-width = <1>;
190       reg-shift = <2>;