Lines Matching +full:output +full:- +full:impedance
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/renesas,rzg2l-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Geert Uytterhoeven <geert+renesas@glider.be>
11 - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
16 Pin multiplexing and GPIO configuration is performed on a per-pin basis.
24 - items:
25 - enum:
26 - renesas,r9a07g043-pinctrl # RZ/G2UL{Type-1,Type-2} and RZ/Five
27 - renesas,r9a07g044-pinctrl # RZ/G2{L,LC}
28 - renesas,r9a08g045-pinctrl # RZ/G3S
29 - renesas,r9a09g057-pinctrl # RZ/V2H(P)
31 - items:
32 - enum:
33 - renesas,r9a07g054-pinctrl # RZ/V2L
34 - const: renesas,r9a07g044-pinctrl # RZ/G2{L,LC} fallback for RZ/V2L
39 gpio-controller: true
41 '#gpio-cells':
45 RZG2L_GPIO() helper macro in <dt-bindings/pinctrl/rzg2l-pinctrl.h> and the
49 gpio-ranges:
52 interrupt-controller: true
54 '#interrupt-cells':
58 RZG2L_GPIO() helper macro in <dt-bindings/pinctrl/rzg2l-pinctrl.h> and the
66 power-domains:
71 - items:
72 - description: GPIO_RSTN signal
73 - description: GPIO_PORT_RESETN signal
74 - description: GPIO_SPARE_RESETN signal
75 - items:
76 - description: PFC main reset
77 - description: Reset for the control register related to WDTUDFCA and WDTUDFFCM pins
81 - type: object
84 - $ref: pincfg-node.yaml#
85 - $ref: pinmux-node.yaml#
97 helper macro in <dt-bindings/pinctrl/rzg2l-pinctrl.h>.
99 drive-strength:
101 drive-strength-microamp:
105 output-impedance-ohms:
107 power-source:
110 slew-rate: true
111 gpio-hog: true
114 input-enable: true
115 output-enable: true
116 output-high: true
117 output-low: true
118 line-name: true
119 bias-disable: true
120 bias-pull-down: true
121 bias-pull-up: true
122 input-schmitt-enable: true
123 input-schmitt-disable: true
124 drive-open-drain: true
125 drive-push-pull: true
126 renesas,output-impedance:
128 Output impedance for pins on the RZ/V2H(P) SoC. The value provided by this
130 register, which adjusts the drive strength value and is pin-dependent.
134 - type: object
139 - $ref: pinctrl.yaml#
141 - if:
145 const: renesas,r9a09g057-pinctrl
156 - compatible
157 - reg
158 - gpio-controller
159 - '#gpio-cells'
160 - gpio-ranges
161 - interrupt-controller
162 - '#interrupt-cells'
163 - clocks
164 - power-domains
165 - resets
168 - |
169 #include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
170 #include <dt-bindings/clock/r9a07g044-cpg.h>
173 compatible = "renesas,r9a07g044-pinctrl";
176 gpio-controller;
177 #gpio-cells = <2>;
178 gpio-ranges = <&pinctrl 0 0 392>;
179 interrupt-controller;
180 #interrupt-cells = <2>;
185 power-domains = <&cpg>;
194 input-enable;
197 sd1-pwr-en-hog {
198 gpio-hog;
200 output-high;
201 line-name = "sd1_pwr_en";
208 power-source = <3300>;
213 power-source = <3300>;
218 power-source = <3300>;