Lines Matching +full:qcom +full:- +full:sm8650 +full:- +full:tlmm +full:- +full:state
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm8650-tlmm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Technologies, Inc. SM8650 TLMM block
10 - Bjorn Andersson <andersson@kernel.org>
13 Top Level Mode Multiplexer pin controller in Qualcomm SM8650 SoC.
16 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
20 const: qcom,sm8650-tlmm
28 gpio-reserved-ranges:
32 gpio-line-names:
36 "-state$":
38 - $ref: "#/$defs/qcom-sm8650-tlmm-state"
39 - patternProperties:
40 "-pins$":
41 $ref: "#/$defs/qcom-sm8650-tlmm-state"
45 qcom-sm8650-tlmm-state:
50 $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
60 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-9][0-9]|20[0-9])$"
61 - enum: [ ufs_reset, sdc2_clk, sdc2_cmd, sdc2_data ]
101 - pins
104 - compatible
105 - reg
110 - |
111 #include <dt-bindings/interrupt-controller/arm-gic.h>
112 tlmm: pinctrl@f100000 {
113 compatible = "qcom,sm8650-tlmm";
115 gpio-controller;
116 #gpio-cells = <2>;
117 gpio-ranges = <&tlmm 0 0 211>;
118 interrupt-controller;
119 #interrupt-cells = <2>;
122 gpio-wo-state {
127 uart-w-state {
128 rx-pins {
131 bias-pull-up;
134 tx-pins {
137 bias-disable;