Lines Matching +full:dmic01 +full:- +full:state
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,sc8280xp-lpass-lpi-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
18 const: qcom,sc8280xp-lpass-lpi-pinctrl
22 - description: LPASS LPI TLMM Control and Status registers
23 - description: LPASS LPI MCC registers
27 - description: LPASS Core voting clock
28 - description: LPASS Audio voting clock
30 clock-names:
32 - const: core
33 - const: audio
36 "-state$":
38 - $ref: "#/$defs/qcom-sc8280xp-lpass-state"
39 - patternProperties:
40 "-pins$":
41 $ref: "#/$defs/qcom-sc8280xp-lpass-state"
45 qcom-sc8280xp-lpass-state:
50 $ref: qcom,lpass-lpi-common.yaml#/$defs/qcom-tlmm-state
59 pattern: "^gpio([0-9]|1[0-8])$"
74 - $ref: qcom,lpass-lpi-common.yaml#
77 - compatible
78 - reg
79 - clocks
80 - clock-names
85 - |
86 #include <dt-bindings/sound/qcom,q6afe.h>
88 compatible = "qcom,sc8280xp-lpass-lpi-pinctrl";
93 clock-names = "core", "audio";
94 gpio-controller;
95 #gpio-cells = <2>;
96 gpio-ranges = <&lpi_tlmm 0 0 19>;
98 dmic01-state {
99 dmic01-clk-pins {
104 dmic01-clk-sleep-pins {
110 tx-swr-data-sleep-state {